xref: /linux/arch/parisc/include/asm/special_insns.h (revision f9bff0e31881d03badf191d3b0005839391f5f2b)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __PARISC_SPECIAL_INSNS_H
3 #define __PARISC_SPECIAL_INSNS_H
4 
5 #define lpa(va)	({					\
6 	unsigned long pa;				\
7 	__asm__ __volatile__(				\
8 		"copy %%r0,%0\n"			\
9 		"8:\tlpa %%r0(%1),%0\n"			\
10 		"9:\n"					\
11 		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b)	\
12 		: "=&r" (pa)				\
13 		: "r" (va)				\
14 		: "memory"				\
15 	);						\
16 	pa;						\
17 })
18 
19 #define lpa_user(va)	({				\
20 	unsigned long pa;				\
21 	__asm__ __volatile__(				\
22 		"copy %%r0,%0\n"			\
23 		"8:\tlpa %%r0(%%sr3,%1),%0\n"		\
24 		"9:\n"					\
25 		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b)	\
26 		: "=&r" (pa)				\
27 		: "r" (va)				\
28 		: "memory"				\
29 	);						\
30 	pa;						\
31 })
32 
33 #define CR_EIEM 15	/* External Interrupt Enable Mask */
34 #define CR_CR16 16	/* CR16 Interval Timer */
35 #define CR_EIRR 23	/* External Interrupt Request Register */
36 
37 #define mfctl(reg)	({		\
38 	unsigned long cr;		\
39 	__asm__ __volatile__(		\
40 		"mfctl %1,%0" :		\
41 		 "=r" (cr) : "i" (reg)	\
42 	);				\
43 	cr;				\
44 })
45 
46 #define mtctl(gr, cr) \
47 	__asm__ __volatile__("mtctl %0,%1" \
48 		: /* no outputs */ \
49 		: "r" (gr), "i" (cr) : "memory")
50 
51 #define get_eiem()	mfctl(CR_EIEM)
52 #define set_eiem(val)	mtctl(val, CR_EIEM)
53 
54 #define mfsp(reg)	({		\
55 	unsigned long cr;		\
56 	__asm__ __volatile__(		\
57 		"mfsp %%sr%1,%0"	\
58 		: "=r" (cr) : "i"(reg)	\
59 	);				\
60 	cr;				\
61 })
62 
63 #define mtsp(val, cr) \
64 	{ if (__builtin_constant_p(val) && ((val) == 0)) \
65 	 __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
66 	else \
67 	 __asm__ __volatile__("mtsp %0,%1" \
68 		: /* no outputs */ \
69 		: "r" (val), "i" (cr) : "memory"); }
70 
71 #endif /* __PARISC_SPECIAL_INSNS_H */
72