xref: /linux/arch/parisc/include/asm/special_insns.h (revision 5f60d5f6bbc12e782fac78110b0ee62698f3b576)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __PARISC_SPECIAL_INSNS_H
3 #define __PARISC_SPECIAL_INSNS_H
4 
5 #define lpa(va)	({					\
6 	unsigned long pa;				\
7 	__asm__ __volatile__(				\
8 		"copy %%r0,%0\n"			\
9 		"8:\tlpa %%r0(%1),%0\n"			\
10 		"9:\n"					\
11 		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b,	\
12 				"or %%r0,%%r0,%%r0")	\
13 		: "=&r" (pa)				\
14 		: "r" (va)				\
15 		: "memory"				\
16 	);						\
17 	pa;						\
18 })
19 
20 #define lpa_user(va)	({				\
21 	unsigned long pa;				\
22 	__asm__ __volatile__(				\
23 		"copy %%r0,%0\n"			\
24 		"8:\tlpa %%r0(%%sr3,%1),%0\n"		\
25 		"9:\n"					\
26 		ASM_EXCEPTIONTABLE_ENTRY(8b, 9b,	\
27 				"or %%r0,%%r0,%%r0")	\
28 		: "=&r" (pa)				\
29 		: "r" (va)				\
30 		: "memory"				\
31 	);						\
32 	pa;						\
33 })
34 
35 #define CR_EIEM 15	/* External Interrupt Enable Mask */
36 #define CR_CR16 16	/* CR16 Interval Timer */
37 #define CR_EIRR 23	/* External Interrupt Request Register */
38 
39 #define mfctl(reg)	({		\
40 	unsigned long cr;		\
41 	__asm__ __volatile__(		\
42 		"mfctl %1,%0" :		\
43 		 "=r" (cr) : "i" (reg)	\
44 	);				\
45 	cr;				\
46 })
47 
48 #define mtctl(gr, cr) \
49 	__asm__ __volatile__("mtctl %0,%1" \
50 		: /* no outputs */ \
51 		: "r" (gr), "i" (cr) : "memory")
52 
53 #define get_eiem()	mfctl(CR_EIEM)
54 #define set_eiem(val)	mtctl(val, CR_EIEM)
55 
56 #define mfsp(reg)	({		\
57 	unsigned long cr;		\
58 	__asm__ __volatile__(		\
59 		"mfsp %%sr%1,%0"	\
60 		: "=r" (cr) : "i"(reg)	\
61 	);				\
62 	cr;				\
63 })
64 
65 #define mtsp(val, cr) \
66 	{ if (__builtin_constant_p(val) && ((val) == 0)) \
67 	 __asm__ __volatile__("mtsp %%r0,%0" : : "i" (cr) : "memory"); \
68 	else \
69 	 __asm__ __volatile__("mtsp %0,%1" \
70 		: /* no outputs */ \
71 		: "r" (val), "i" (cr) : "memory"); }
72 
73 #endif /* __PARISC_SPECIAL_INSNS_H */
74