xref: /linux/arch/parisc/include/asm/io.h (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_IO_H
3 #define _ASM_IO_H
4 
5 #include <linux/types.h>
6 #include <linux/pgtable.h>
7 
8 #define virt_to_phys(a) ((unsigned long)__pa(a))
9 #define phys_to_virt(a) __va(a)
10 
11 static inline unsigned long isa_bus_to_virt(unsigned long addr) {
12 	BUG();
13 	return 0;
14 }
15 
16 static inline unsigned long isa_virt_to_bus(void *addr) {
17 	BUG();
18 	return 0;
19 }
20 
21 /*
22  * Memory mapped I/O
23  *
24  * readX()/writeX() do byteswapping and take an ioremapped address
25  * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
26  * gsc_*() don't byteswap and operate on physical addresses;
27  *   eg dev->hpa or 0xfee00000.
28  */
29 
30 static inline unsigned char gsc_readb(unsigned long addr)
31 {
32 	long flags;
33 	unsigned char ret;
34 
35 	__asm__ __volatile__(
36 	"	rsm	%3,%0\n"
37 	"	ldbx	0(%2),%1\n"
38 	"	mtsm	%0\n"
39 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
40 
41 	return ret;
42 }
43 
44 static inline unsigned short gsc_readw(unsigned long addr)
45 {
46 	long flags;
47 	unsigned short ret;
48 
49 	__asm__ __volatile__(
50 	"	rsm	%3,%0\n"
51 	"	ldhx	0(%2),%1\n"
52 	"	mtsm	%0\n"
53 	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
54 
55 	return ret;
56 }
57 
58 static inline unsigned int gsc_readl(unsigned long addr)
59 {
60 	u32 ret;
61 
62 	__asm__ __volatile__(
63 	"	ldwax	0(%1),%0\n"
64 	: "=r" (ret) : "r" (addr) );
65 
66 	return ret;
67 }
68 
69 static inline unsigned long long gsc_readq(unsigned long addr)
70 {
71 	unsigned long long ret;
72 
73 #ifdef CONFIG_64BIT
74 	__asm__ __volatile__(
75 	"	ldda	0(%1),%0\n"
76 	:  "=r" (ret) : "r" (addr) );
77 #else
78 	/* two reads may have side effects.. */
79 	ret = ((u64) gsc_readl(addr)) << 32;
80 	ret |= gsc_readl(addr+4);
81 #endif
82 	return ret;
83 }
84 
85 static inline void gsc_writeb(unsigned char val, unsigned long addr)
86 {
87 	long flags;
88 	__asm__ __volatile__(
89 	"	rsm	%3,%0\n"
90 	"	stbs	%1,0(%2)\n"
91 	"	mtsm	%0\n"
92 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
93 }
94 
95 static inline void gsc_writew(unsigned short val, unsigned long addr)
96 {
97 	long flags;
98 	__asm__ __volatile__(
99 	"	rsm	%3,%0\n"
100 	"	sths	%1,0(%2)\n"
101 	"	mtsm	%0\n"
102 	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
103 }
104 
105 static inline void gsc_writel(unsigned int val, unsigned long addr)
106 {
107 	__asm__ __volatile__(
108 	"	stwas	%0,0(%1)\n"
109 	: :  "r" (val), "r" (addr) );
110 }
111 
112 static inline void gsc_writeq(unsigned long long val, unsigned long addr)
113 {
114 #ifdef CONFIG_64BIT
115 	__asm__ __volatile__(
116 	"	stda	%0,0(%1)\n"
117 	: :  "r" (val), "r" (addr) );
118 #else
119 	/* two writes may have side effects.. */
120 	gsc_writel(val >> 32, addr);
121 	gsc_writel(val, addr+4);
122 #endif
123 }
124 
125 /*
126  * The standard PCI ioremap interfaces
127  */
128 #define ioremap_prot ioremap_prot
129 
130 #define _PAGE_IOREMAP (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
131 		       _PAGE_ACCESSED | _PAGE_NO_CACHE)
132 
133 #define ioremap_wc(addr, size)  \
134 	ioremap_prot((addr), (size), _PAGE_IOREMAP)
135 
136 #define pci_iounmap			pci_iounmap
137 
138 void memset_io(volatile void __iomem *addr, unsigned char val, int count);
139 void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
140 void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
141 #define memset_io memset_io
142 #define memcpy_fromio memcpy_fromio
143 #define memcpy_toio memcpy_toio
144 
145 /* Port-space IO */
146 
147 #define inb_p inb
148 #define inw_p inw
149 #define inl_p inl
150 #define outb_p outb
151 #define outw_p outw
152 #define outl_p outl
153 
154 extern unsigned char eisa_in8(unsigned short port);
155 extern unsigned short eisa_in16(unsigned short port);
156 extern unsigned int eisa_in32(unsigned short port);
157 extern void eisa_out8(unsigned char data, unsigned short port);
158 extern void eisa_out16(unsigned short data, unsigned short port);
159 extern void eisa_out32(unsigned int data, unsigned short port);
160 
161 #if defined(CONFIG_PCI)
162 extern unsigned char inb(int addr);
163 extern unsigned short inw(int addr);
164 extern unsigned int inl(int addr);
165 extern void outb(unsigned char b, int addr);
166 extern void outw(unsigned short b, int addr);
167 extern void outl(unsigned int b, int addr);
168 #define inb inb
169 #define inw inw
170 #define inl inl
171 #define outb outb
172 #define outw outw
173 #define outl outl
174 #elif defined(CONFIG_EISA)
175 #define inb eisa_in8
176 #define inw eisa_in16
177 #define inl eisa_in32
178 #define outb eisa_out8
179 #define outw eisa_out16
180 #define outl eisa_out32
181 #else
182 static inline char inb(unsigned long addr)
183 {
184 	BUG();
185 	return -1;
186 }
187 
188 static inline short inw(unsigned long addr)
189 {
190 	BUG();
191 	return -1;
192 }
193 
194 static inline int inl(unsigned long addr)
195 {
196 	BUG();
197 	return -1;
198 }
199 #define inb inb
200 #define inw inw
201 #define inl inl
202 #define outb(x, y)	({(void)(x); (void)(y); BUG(); 0;})
203 #define outw(x, y)	({(void)(x); (void)(y); BUG(); 0;})
204 #define outl(x, y)	({(void)(x); (void)(y); BUG(); 0;})
205 #endif
206 
207 /*
208  * String versions of in/out ops:
209  */
210 extern void insb (unsigned long port, void *dst, unsigned long count);
211 extern void insw (unsigned long port, void *dst, unsigned long count);
212 extern void insl (unsigned long port, void *dst, unsigned long count);
213 extern void outsb (unsigned long port, const void *src, unsigned long count);
214 extern void outsw (unsigned long port, const void *src, unsigned long count);
215 extern void outsl (unsigned long port, const void *src, unsigned long count);
216 #define insb insb
217 #define insw insw
218 #define insl insl
219 #define outsb outsb
220 #define outsw outsw
221 #define outsl outsl
222 
223 /* IO Port space is :      BBiiii   where BB is HBA number. */
224 #define IO_SPACE_LIMIT 0x00ffffff
225 
226 /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
227  * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
228  * mode (essentially just sign extending.  This macro takes in a 32
229  * bit I/O address (still with the leading f) and outputs the correct
230  * value for either 32 or 64 bit mode */
231 #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
232 
233 #ifdef CONFIG_64BIT
234 #define ioread64 ioread64
235 #define ioread64be ioread64be
236 #define iowrite64 iowrite64
237 #define iowrite64be iowrite64be
238 extern u64 ioread64(const void __iomem *addr);
239 extern u64 ioread64be(const void __iomem *addr);
240 extern void iowrite64(u64 val, void __iomem *addr);
241 extern void iowrite64be(u64 val, void __iomem *addr);
242 #endif
243 
244 #include <asm-generic/iomap.h>
245 /*
246  * These get provided from <asm-generic/iomap.h> since parisc does not
247  * select GENERIC_IOMAP.
248  */
249 #define ioport_map ioport_map
250 #define ioport_unmap ioport_unmap
251 #define ioread8 ioread8
252 #define ioread16 ioread16
253 #define ioread32 ioread32
254 #define ioread16be ioread16be
255 #define ioread32be ioread32be
256 #define iowrite8 iowrite8
257 #define iowrite16 iowrite16
258 #define iowrite32 iowrite32
259 #define iowrite16be iowrite16be
260 #define iowrite32be iowrite32be
261 #define ioread8_rep ioread8_rep
262 #define ioread16_rep ioread16_rep
263 #define ioread32_rep ioread32_rep
264 #define iowrite8_rep iowrite8_rep
265 #define iowrite16_rep iowrite16_rep
266 #define iowrite32_rep iowrite32_rep
267 
268 extern int devmem_is_allowed(unsigned long pfn);
269 
270 #include <asm-generic/io.h>
271 
272 #endif
273