xref: /linux/arch/parisc/include/asm/eisa_eeprom.h (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1 /*
2  * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  *
9  * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
10  *
11  */
12 
13 #ifndef ASM_EISA_EEPROM_H
14 #define ASM_EISA_EEPROM_H
15 
16 extern void __iomem *eisa_eeprom_addr;
17 
18 #define HPEE_MAX_LENGTH       0x2000	/* maximum eeprom length */
19 
20 #define HPEE_SLOT_INFO(slot) (20+(48*slot))
21 
22 struct eeprom_header
23 {
24 
25 	u_int32_t num_writes;       /* number of writes */
26  	u_int8_t  flags;            /* flags, usage? */
27 	u_int8_t  ver_maj;
28 	u_int8_t  ver_min;
29 	u_int8_t  num_slots;        /* number of EISA slots in system */
30 	u_int16_t csum;             /* checksum, I don't know how to calculate this */
31 	u_int8_t  pad[10];
32 } __attribute__ ((packed));
33 
34 
35 struct eeprom_eisa_slot_info
36 {
37 	u_int32_t eisa_slot_id;
38 	u_int32_t config_data_offset;
39 	u_int32_t num_writes;
40 	u_int16_t csum;
41 	u_int16_t num_functions;
42 	u_int16_t config_data_length;
43 
44 	/* bits 0..3 are the duplicate slot id */
45 #define HPEE_SLOT_INFO_EMBEDDED  0x10
46 #define HPEE_SLOT_INFO_VIRTUAL   0x20
47 #define HPEE_SLOT_INFO_NO_READID 0x40
48 #define HPEE_SLOT_INFO_DUPLICATE 0x80
49 	u_int8_t slot_info;
50 
51 #define HPEE_SLOT_FEATURES_ENABLE         0x01
52 #define HPEE_SLOT_FEATURES_IOCHK          0x02
53 #define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
54 	u_int8_t slot_features;
55 
56 	u_int8_t  ver_min;
57 	u_int8_t  ver_maj;
58 
59 #define HPEE_FUNCTION_INFO_HAVE_TYPE      0x01
60 #define HPEE_FUNCTION_INFO_HAVE_MEMORY    0x02
61 #define HPEE_FUNCTION_INFO_HAVE_IRQ       0x04
62 #define HPEE_FUNCTION_INFO_HAVE_DMA       0x08
63 #define HPEE_FUNCTION_INFO_HAVE_PORT      0x10
64 #define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
65 /* I think there are two slighty different
66  * versions of the function_info field
67  * one int the fixed header and one optional
68  * in the parsed slot data area */
69 #define HPEE_FUNCTION_INFO_HAVE_FUNCTION  0x01
70 #define HPEE_FUNCTION_INFO_F_DISABLED     0x80
71 #define HPEE_FUNCTION_INFO_CFG_FREE_FORM  0x40
72 	u_int8_t  function_info;
73 
74 #define HPEE_FLAG_BOARD_IS_ISA		  0x01 /* flag and minor version for isa board */
75 	u_int8_t  flags;
76 	u_int8_t  pad[24];
77 } __attribute__ ((packed));
78 
79 
80 #define HPEE_MEMORY_MAX_ENT   9
81 /* memory descriptor: byte 0 */
82 #define HPEE_MEMORY_WRITABLE  0x01
83 #define HPEE_MEMORY_CACHABLE  0x02
84 #define HPEE_MEMORY_TYPE_MASK 0x18
85 #define HPEE_MEMORY_TYPE_SYS  0x00
86 #define HPEE_MEMORY_TYPE_EXP  0x08
87 #define HPEE_MEMORY_TYPE_VIR  0x10
88 #define HPEE_MEMORY_TYPE_OTH  0x18
89 #define HPEE_MEMORY_SHARED    0x20
90 #define HPEE_MEMORY_MORE      0x80
91 
92 /* memory descriptor: byte 1 */
93 #define HPEE_MEMORY_WIDTH_MASK 0x03
94 #define HPEE_MEMORY_WIDTH_BYTE 0x00
95 #define HPEE_MEMORY_WIDTH_WORD 0x01
96 #define HPEE_MEMORY_WIDTH_DWORD 0x02
97 #define HPEE_MEMORY_DECODE_MASK 0x0c
98 #define HPEE_MEMORY_DECODE_20BITS 0x00
99 #define HPEE_MEMORY_DECODE_24BITS 0x04
100 #define HPEE_MEMORY_DECODE_32BITS 0x08
101 /* byte 2 and 3 are a 16bit LE value
102  * containging the memory size in kilobytes */
103 /* byte 4,5,6 are a 24bit LE value
104  * containing the memory base address */
105 
106 
107 #define HPEE_IRQ_MAX_ENT      7
108 /* Interrupt entry: byte 0 */
109 #define HPEE_IRQ_CHANNEL_MASK 0xf
110 #define HPEE_IRQ_TRIG_LEVEL   0x20
111 #define HPEE_IRQ_MORE         0x80
112 /* byte 1 seems to be unused */
113 
114 #define HPEE_DMA_MAX_ENT     4
115 
116 /* dma entry: byte 0 */
117 #define HPEE_DMA_CHANNEL_MASK 7
118 #define HPEE_DMA_SIZE_MASK	0xc
119 #define HPEE_DMA_SIZE_BYTE	0x0
120 #define HPEE_DMA_SIZE_WORD	0x4
121 #define HPEE_DMA_SIZE_DWORD	0x8
122 #define HPEE_DMA_SHARED      0x40
123 #define HPEE_DMA_MORE        0x80
124 
125 /* dma entry: byte 1 */
126 #define HPEE_DMA_TIMING_MASK 0x30
127 #define HPEE_DMA_TIMING_ISA	0x0
128 #define HPEE_DMA_TIMING_TYPEA 0x10
129 #define HPEE_DMA_TIMING_TYPEB 0x20
130 #define HPEE_DMA_TIMING_TYPEC 0x30
131 
132 #define HPEE_PORT_MAX_ENT 20
133 /* port entry byte 0 */
134 #define HPEE_PORT_SIZE_MASK 0x1f
135 #define HPEE_PORT_SHARED    0x40
136 #define HPEE_PORT_MORE      0x80
137 /* byte 1 and 2 is a 16bit LE value
138  * conating the start port number */
139 
140 #define HPEE_PORT_INIT_MAX_LEN     60 /* in bytes here */
141 /* port init entry byte 0 */
142 #define HPEE_PORT_INIT_WIDTH_MASK  0x3
143 #define HPEE_PORT_INIT_WIDTH_BYTE  0x0
144 #define HPEE_PORT_INIT_WIDTH_WORD  0x1
145 #define HPEE_PORT_INIT_WIDTH_DWORD 0x2
146 #define HPEE_PORT_INIT_MASK        0x4
147 #define HPEE_PORT_INIT_MORE        0x80
148 
149 #define HPEE_SELECTION_MAX_ENT 26
150 
151 #define HPEE_TYPE_MAX_LEN    80
152 
153 #endif
154