1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * OpenRISC idle.c 4 * 5 * Linux architectural port borrowing liberally from similar works of 6 * others. All original copyrights apply as per the original source 7 * declaration. 8 * 9 * Modifications for the OpenRISC architecture: 10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com> 11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se> 12 */ 13 14 #include <linux/signal.h> 15 #include <linux/sched.h> 16 #include <linux/kernel.h> 17 #include <linux/errno.h> 18 #include <linux/string.h> 19 #include <linux/types.h> 20 #include <linux/ptrace.h> 21 #include <linux/mman.h> 22 #include <linux/mm.h> 23 #include <linux/swap.h> 24 #include <linux/smp.h> 25 #include <linux/memblock.h> 26 #include <linux/init.h> 27 #include <linux/delay.h> 28 #include <linux/pagemap.h> 29 30 #include <asm/pgalloc.h> 31 #include <asm/dma.h> 32 #include <asm/io.h> 33 #include <asm/tlb.h> 34 #include <asm/mmu_context.h> 35 #include <asm/fixmap.h> 36 #include <asm/tlbflush.h> 37 #include <asm/sections.h> 38 #include <asm/cacheflush.h> 39 40 int mem_init_done; 41 42 void __init arch_zone_limits_init(unsigned long *max_zone_pfns) 43 { 44 /* 45 * We use only ZONE_NORMAL 46 */ 47 max_zone_pfns[ZONE_NORMAL] = max_low_pfn; 48 } 49 50 extern const char _s_kernel_ro[], _e_kernel_ro[]; 51 52 /* 53 * Map all physical memory into kernel's address space. 54 * 55 * This is explicitly coded for two-level page tables, so if you need 56 * something else then this needs to change. 57 */ 58 static void __init map_ram(void) 59 { 60 phys_addr_t start, end; 61 unsigned long v, p, e; 62 pgprot_t prot; 63 pgd_t *pge; 64 p4d_t *p4e; 65 pud_t *pue; 66 pmd_t *pme; 67 pte_t *pte; 68 u64 i; 69 /* These mark extents of read-only kernel pages... 70 * ...from vmlinux.lds.S 71 */ 72 73 v = PAGE_OFFSET; 74 75 for_each_mem_range(i, &start, &end) { 76 p = (u32) start & PAGE_MASK; 77 e = (u32) end; 78 79 v = (u32) __va(p); 80 pge = pgd_offset_k(v); 81 82 while (p < e) { 83 int j; 84 p4e = p4d_offset(pge, v); 85 pue = pud_offset(p4e, v); 86 pme = pmd_offset(pue, v); 87 88 if ((u32) pue != (u32) pge || (u32) pme != (u32) pge) { 89 panic("%s: OR1K kernel hardcoded for " 90 "two-level page tables", 91 __func__); 92 } 93 94 /* Alloc one page for holding PTE's... */ 95 pte = memblock_alloc_raw(PAGE_SIZE, PAGE_SIZE); 96 if (!pte) 97 panic("%s: Failed to allocate page for PTEs\n", 98 __func__); 99 set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte))); 100 101 /* Fill the newly allocated page with PTE'S */ 102 for (j = 0; p < e && j < PTRS_PER_PTE; 103 v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) { 104 if (v >= (u32) _e_kernel_ro || 105 v < (u32) _s_kernel_ro) 106 prot = PAGE_KERNEL; 107 else 108 prot = PAGE_KERNEL_RO; 109 110 set_pte(pte, mk_pte_phys(p, prot)); 111 } 112 113 pge++; 114 } 115 116 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__, 117 start, end); 118 } 119 } 120 121 void __init paging_init(void) 122 { 123 int i; 124 125 printk(KERN_INFO "Setting up paging and PTEs.\n"); 126 127 /* clear out the init_mm.pgd that will contain the kernel's mappings */ 128 129 for (i = 0; i < PTRS_PER_PGD; i++) 130 swapper_pg_dir[i] = __pgd(0); 131 132 /* make sure the current pgd table points to something sane 133 * (even if it is most probably not used until the next 134 * switch_mm) 135 */ 136 current_pgd[smp_processor_id()] = init_mm.pgd; 137 138 map_ram(); 139 140 /* self modifying code ;) */ 141 /* Since the old TLB miss handler has been running up until now, 142 * the kernel pages are still all RW, so we can still modify the 143 * text directly... after this change and a TLB flush, the kernel 144 * pages will become RO. 145 */ 146 { 147 extern unsigned long dtlb_miss_handler; 148 extern unsigned long itlb_miss_handler; 149 150 unsigned long *dtlb_vector = __va(0x900); 151 unsigned long *itlb_vector = __va(0xa00); 152 153 printk(KERN_INFO "itlb_miss_handler %p\n", &itlb_miss_handler); 154 *itlb_vector = ((unsigned long)&itlb_miss_handler - 155 (unsigned long)itlb_vector) >> 2; 156 157 /* Soft ordering constraint to ensure that dtlb_vector is 158 * the last thing updated 159 */ 160 barrier(); 161 162 printk(KERN_INFO "dtlb_miss_handler %p\n", &dtlb_miss_handler); 163 *dtlb_vector = ((unsigned long)&dtlb_miss_handler - 164 (unsigned long)dtlb_vector) >> 2; 165 166 } 167 168 /* Soft ordering constraint to ensure that cache invalidation and 169 * TLB flush really happen _after_ code has been modified. 170 */ 171 barrier(); 172 173 /* Invalidate instruction caches after code modification */ 174 local_icache_block_inv(0x900); 175 local_icache_block_inv(0xa00); 176 177 /* New TLB miss handlers and kernel page tables are in now place. 178 * Make sure that page flags get updated for all pages in TLB by 179 * flushing the TLB and forcing all TLB entries to be recreated 180 * from their page table flags. 181 */ 182 flush_tlb_all(); 183 } 184 185 /* References to section boundaries */ 186 187 void __init mem_init(void) 188 { 189 BUG_ON(!mem_map); 190 191 /* clear the zero-page */ 192 memset((void *)empty_zero_page, 0, PAGE_SIZE); 193 194 printk("mem_init_done ...........................................\n"); 195 mem_init_done = 1; 196 return; 197 } 198 199 static int __init map_page(unsigned long va, phys_addr_t pa, pgprot_t prot) 200 { 201 p4d_t *p4d; 202 pud_t *pud; 203 pmd_t *pmd; 204 pte_t *pte; 205 206 p4d = p4d_offset(pgd_offset_k(va), va); 207 pud = pud_offset(p4d, va); 208 pmd = pmd_offset(pud, va); 209 pte = pte_alloc_kernel(pmd, va); 210 211 if (pte == NULL) 212 return -ENOMEM; 213 214 if (pgprot_val(prot)) 215 set_pte_at(&init_mm, va, pte, pfn_pte(pa >> PAGE_SHIFT, prot)); 216 else 217 pte_clear(&init_mm, va, pte); 218 219 local_flush_tlb_page(NULL, va); 220 return 0; 221 } 222 223 /* 224 * __set_fix must now support both EARLYCON and TEXT_POKE mappings, 225 * which are used at different stages of kernel execution. 226 */ 227 void __set_fixmap(enum fixed_addresses idx, 228 phys_addr_t phys, pgprot_t prot) 229 { 230 unsigned long address = __fix_to_virt(idx); 231 232 if (idx >= __end_of_fixed_addresses) { 233 BUG(); 234 return; 235 } 236 237 map_page(address, phys, prot); 238 } 239 240 static const pgprot_t protection_map[16] = { 241 [VM_NONE] = PAGE_NONE, 242 [VM_READ] = PAGE_READONLY_X, 243 [VM_WRITE] = PAGE_COPY, 244 [VM_WRITE | VM_READ] = PAGE_COPY_X, 245 [VM_EXEC] = PAGE_READONLY, 246 [VM_EXEC | VM_READ] = PAGE_READONLY_X, 247 [VM_EXEC | VM_WRITE] = PAGE_COPY, 248 [VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_X, 249 [VM_SHARED] = PAGE_NONE, 250 [VM_SHARED | VM_READ] = PAGE_READONLY_X, 251 [VM_SHARED | VM_WRITE] = PAGE_SHARED, 252 [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED_X, 253 [VM_SHARED | VM_EXEC] = PAGE_READONLY, 254 [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READONLY_X, 255 [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED, 256 [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_X 257 }; 258 DECLARE_VM_GET_PAGE_PROT 259