1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * OpenRISC cache.c 4 * 5 * Linux architectural port borrowing liberally from similar works of 6 * others. All original copyrights apply as per the original source 7 * declaration. 8 * 9 * Modifications for the OpenRISC architecture: 10 * Copyright (C) 2015 Jan Henrik Weinstock <jan.weinstock@rwth-aachen.de> 11 */ 12 13 #include <asm/spr.h> 14 #include <asm/spr_defs.h> 15 #include <asm/cache.h> 16 #include <asm/cacheflush.h> 17 #include <asm/cpuinfo.h> 18 #include <asm/tlbflush.h> 19 20 /* 21 * Check if the cache component exists. 22 */ 23 bool cpu_cache_is_present(const unsigned int cache_type) 24 { 25 unsigned long upr = mfspr(SPR_UPR); 26 unsigned long mask = SPR_UPR_UP | cache_type; 27 28 return !((upr & mask) ^ mask); 29 } 30 31 static __always_inline void cache_loop(unsigned long paddr, unsigned long end, 32 const unsigned short reg, const unsigned int cache_type) 33 { 34 if (!cpu_cache_is_present(cache_type)) 35 return; 36 37 while (paddr < end) { 38 mtspr(reg, paddr); 39 paddr += L1_CACHE_BYTES; 40 } 41 } 42 43 static __always_inline void cache_loop_page(struct page *page, const unsigned short reg, 44 const unsigned int cache_type) 45 { 46 unsigned long paddr = page_to_pfn(page) << PAGE_SHIFT; 47 unsigned long end = paddr + PAGE_SIZE; 48 49 paddr &= ~(L1_CACHE_BYTES - 1); 50 51 cache_loop(paddr, end, reg, cache_type); 52 } 53 54 void local_dcache_page_flush(struct page *page) 55 { 56 cache_loop_page(page, SPR_DCBFR, SPR_UPR_DCP); 57 } 58 EXPORT_SYMBOL(local_dcache_page_flush); 59 60 void local_icache_page_inv(struct page *page) 61 { 62 cache_loop_page(page, SPR_ICBIR, SPR_UPR_ICP); 63 } 64 EXPORT_SYMBOL(local_icache_page_inv); 65 66 void local_icache_all_inv(void) 67 { 68 if (cpu_cache_is_present(SPR_UPR_ICP)) { 69 unsigned long iccfgr = mfspr(SPR_ICCFGR); 70 unsigned long sets = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3); 71 unsigned long block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7); 72 unsigned long paddr = 0; 73 unsigned long end = sets * block_size; 74 75 while (paddr < end) { 76 mtspr(SPR_ICBIR, paddr); 77 paddr += block_size; 78 } 79 } 80 } 81 82 void local_dcache_range_flush(unsigned long start, unsigned long end) 83 { 84 cache_loop(start, end, SPR_DCBFR, SPR_UPR_DCP); 85 } 86 87 void local_dcache_range_inv(unsigned long start, unsigned long end) 88 { 89 cache_loop(start, end, SPR_DCBIR, SPR_UPR_DCP); 90 } 91 92 void local_icache_range_inv(unsigned long start, unsigned long end) 93 { 94 cache_loop(start, end, SPR_ICBIR, SPR_UPR_ICP); 95 } 96 97 void update_cache(struct vm_area_struct *vma, unsigned long address, 98 pte_t *pte) 99 { 100 unsigned long pfn = pte_val(*pte) >> PAGE_SHIFT; 101 struct folio *folio = page_folio(pfn_to_page(pfn)); 102 int dirty = !test_and_set_bit(PG_dc_clean, &folio->flags.f); 103 104 /* 105 * Since icaches do not snoop for updated data on OpenRISC, we 106 * must write back and invalidate any dirty pages manually. We 107 * can skip data pages, since they will not end up in icaches. 108 */ 109 if ((vma->vm_flags & VM_EXEC) && dirty) { 110 unsigned int nr = folio_nr_pages(folio); 111 112 while (nr--) 113 sync_icache_dcache(folio_page(folio, nr)); 114 } 115 } 116