1*111005caSStafford Horne// SPDX-License-Identifier: GPL-2.0 2*111005caSStafford Horne 3*111005caSStafford Horne/dts-v1/; 4*111005caSStafford Horne 5*111005caSStafford Horne#include "de0-nano-common.dtsi" 6*111005caSStafford Horne 7*111005caSStafford Horne/ { 8*111005caSStafford Horne model = "Terasic DE0 Nano"; 9*111005caSStafford Horne compatible = "opencores,or1ksim"; 10*111005caSStafford Horne #address-cells = <1>; 11*111005caSStafford Horne #size-cells = <1>; 12*111005caSStafford Horne interrupt-parent = <&pic>; 13*111005caSStafford Horne 14*111005caSStafford Horne aliases { 15*111005caSStafford Horne uart0 = &serial0; 16*111005caSStafford Horne }; 17*111005caSStafford Horne 18*111005caSStafford Horne chosen { 19*111005caSStafford Horne stdout-path = "uart0:115200"; 20*111005caSStafford Horne }; 21*111005caSStafford Horne 22*111005caSStafford Horne cpus { 23*111005caSStafford Horne #address-cells = <1>; 24*111005caSStafford Horne #size-cells = <0>; 25*111005caSStafford Horne 26*111005caSStafford Horne cpu@0 { 27*111005caSStafford Horne compatible = "opencores,or1200-rtlsvn481"; 28*111005caSStafford Horne reg = <0>; 29*111005caSStafford Horne clock-frequency = <50000000>; 30*111005caSStafford Horne }; 31*111005caSStafford Horne }; 32*111005caSStafford Horne 33*111005caSStafford Horne /* 34*111005caSStafford Horne * OR1K PIC is built into CPU and accessed via special purpose 35*111005caSStafford Horne * registers. It is not addressable and, hence, has no 'reg' 36*111005caSStafford Horne * property. 37*111005caSStafford Horne */ 38*111005caSStafford Horne pic: pic { 39*111005caSStafford Horne compatible = "opencores,or1k-pic"; 40*111005caSStafford Horne #interrupt-cells = <1>; 41*111005caSStafford Horne interrupt-controller; 42*111005caSStafford Horne }; 43*111005caSStafford Horne 44*111005caSStafford Horne serial0: serial@90000000 { 45*111005caSStafford Horne compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; 46*111005caSStafford Horne reg = <0x90000000 0x100>; 47*111005caSStafford Horne interrupts = <2>; 48*111005caSStafford Horne clock-frequency = <50000000>; 49*111005caSStafford Horne }; 50*111005caSStafford Horne}; 51*111005caSStafford Horne 52*111005caSStafford Horne&gpio1 { 53*111005caSStafford Horne status = "okay"; 54*111005caSStafford Horne}; 55