1 /* 2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 3 * and RBTX49xx patch from CELF patch archive. 4 * 5 * 2003-2005 (c) MontaVista Software, Inc. 6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/interrupt.h> 16 #include <linux/string.h> 17 #include <linux/module.h> 18 #include <linux/clk.h> 19 #include <linux/err.h> 20 #include <linux/gpio.h> 21 #include <linux/platform_device.h> 22 #include <linux/serial_core.h> 23 #include <linux/mtd/physmap.h> 24 #include <linux/leds.h> 25 #include <linux/sysdev.h> 26 #include <linux/slab.h> 27 #include <asm/bootinfo.h> 28 #include <asm/time.h> 29 #include <asm/reboot.h> 30 #include <asm/r4kcache.h> 31 #include <asm/sections.h> 32 #include <asm/txx9/generic.h> 33 #include <asm/txx9/pci.h> 34 #include <asm/txx9tmr.h> 35 #include <asm/txx9/ndfmc.h> 36 #include <asm/txx9/dmac.h> 37 #ifdef CONFIG_CPU_TX49XX 38 #include <asm/txx9/tx4938.h> 39 #endif 40 41 /* EBUSC settings of TX4927, etc. */ 42 struct resource txx9_ce_res[8]; 43 static char txx9_ce_res_name[8][4]; /* "CEn" */ 44 45 /* pcode, internal register */ 46 unsigned int txx9_pcode; 47 char txx9_pcode_str[8]; 48 static struct resource txx9_reg_res = { 49 .name = txx9_pcode_str, 50 .flags = IORESOURCE_MEM, 51 }; 52 void __init 53 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) 54 { 55 int i; 56 57 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { 58 sprintf(txx9_ce_res_name[i], "CE%d", i); 59 txx9_ce_res[i].flags = IORESOURCE_MEM; 60 txx9_ce_res[i].name = txx9_ce_res_name[i]; 61 } 62 63 txx9_pcode = pcode; 64 sprintf(txx9_pcode_str, "TX%x", pcode); 65 if (base) { 66 txx9_reg_res.start = base & 0xfffffffffULL; 67 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); 68 request_resource(&iomem_resource, &txx9_reg_res); 69 } 70 } 71 72 /* clocks */ 73 unsigned int txx9_master_clock; 74 unsigned int txx9_cpu_clock; 75 unsigned int txx9_gbus_clock; 76 77 #ifdef CONFIG_CPU_TX39XX 78 /* don't enable by default - see errata */ 79 int txx9_ccfg_toeon __initdata; 80 #else 81 int txx9_ccfg_toeon __initdata = 1; 82 #endif 83 84 /* Minimum CLK support */ 85 86 struct clk *clk_get(struct device *dev, const char *id) 87 { 88 if (!strcmp(id, "spi-baseclk")) 89 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2); 90 if (!strcmp(id, "imbus_clk")) 91 return (struct clk *)((unsigned long)txx9_gbus_clock / 2); 92 return ERR_PTR(-ENOENT); 93 } 94 EXPORT_SYMBOL(clk_get); 95 96 int clk_enable(struct clk *clk) 97 { 98 return 0; 99 } 100 EXPORT_SYMBOL(clk_enable); 101 102 void clk_disable(struct clk *clk) 103 { 104 } 105 EXPORT_SYMBOL(clk_disable); 106 107 unsigned long clk_get_rate(struct clk *clk) 108 { 109 return (unsigned long)clk; 110 } 111 EXPORT_SYMBOL(clk_get_rate); 112 113 void clk_put(struct clk *clk) 114 { 115 } 116 EXPORT_SYMBOL(clk_put); 117 118 /* GPIO support */ 119 120 #ifdef CONFIG_GENERIC_GPIO 121 int gpio_to_irq(unsigned gpio) 122 { 123 return -EINVAL; 124 } 125 EXPORT_SYMBOL(gpio_to_irq); 126 127 int irq_to_gpio(unsigned irq) 128 { 129 return -EINVAL; 130 } 131 EXPORT_SYMBOL(irq_to_gpio); 132 #endif 133 134 #define BOARD_VEC(board) extern struct txx9_board_vec board; 135 #include <asm/txx9/boards.h> 136 #undef BOARD_VEC 137 138 struct txx9_board_vec *txx9_board_vec __initdata; 139 static char txx9_system_type[32]; 140 141 static struct txx9_board_vec *board_vecs[] __initdata = { 142 #define BOARD_VEC(board) &board, 143 #include <asm/txx9/boards.h> 144 #undef BOARD_VEC 145 }; 146 147 static struct txx9_board_vec *__init find_board_byname(const char *name) 148 { 149 int i; 150 151 /* search board_vecs table */ 152 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { 153 if (strstr(board_vecs[i]->system, name)) 154 return board_vecs[i]; 155 } 156 return NULL; 157 } 158 159 static void __init prom_init_cmdline(void) 160 { 161 int argc; 162 int *argv32; 163 int i; /* Always ignore the "-c" at argv[0] */ 164 165 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { 166 /* 167 * argc is not a valid number, or argv32 is not a valid 168 * pointer 169 */ 170 argc = 0; 171 argv32 = NULL; 172 } else { 173 argc = (int)fw_arg0; 174 argv32 = (int *)fw_arg1; 175 } 176 177 arcs_cmdline[0] = '\0'; 178 179 for (i = 1; i < argc; i++) { 180 char *str = (char *)(long)argv32[i]; 181 if (i != 1) 182 strcat(arcs_cmdline, " "); 183 if (strchr(str, ' ')) { 184 strcat(arcs_cmdline, "\""); 185 strcat(arcs_cmdline, str); 186 strcat(arcs_cmdline, "\""); 187 } else 188 strcat(arcs_cmdline, str); 189 } 190 } 191 192 static int txx9_ic_disable __initdata; 193 static int txx9_dc_disable __initdata; 194 195 #if defined(CONFIG_CPU_TX49XX) 196 /* flush all cache on very early stage (before 4k_cache_init) */ 197 static void __init early_flush_dcache(void) 198 { 199 unsigned int conf = read_c0_config(); 200 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); 201 unsigned int linesz = 32; 202 unsigned long addr, end; 203 204 end = INDEX_BASE + dc_size / 4; 205 /* 4way, waybit=0 */ 206 for (addr = INDEX_BASE; addr < end; addr += linesz) { 207 cache_op(Index_Writeback_Inv_D, addr | 0); 208 cache_op(Index_Writeback_Inv_D, addr | 1); 209 cache_op(Index_Writeback_Inv_D, addr | 2); 210 cache_op(Index_Writeback_Inv_D, addr | 3); 211 } 212 } 213 214 static void __init txx9_cache_fixup(void) 215 { 216 unsigned int conf; 217 218 conf = read_c0_config(); 219 /* flush and disable */ 220 if (txx9_ic_disable) { 221 conf |= TX49_CONF_IC; 222 write_c0_config(conf); 223 } 224 if (txx9_dc_disable) { 225 early_flush_dcache(); 226 conf |= TX49_CONF_DC; 227 write_c0_config(conf); 228 } 229 230 /* enable cache */ 231 conf = read_c0_config(); 232 if (!txx9_ic_disable) 233 conf &= ~TX49_CONF_IC; 234 if (!txx9_dc_disable) 235 conf &= ~TX49_CONF_DC; 236 write_c0_config(conf); 237 238 if (conf & TX49_CONF_IC) 239 pr_info("TX49XX I-Cache disabled.\n"); 240 if (conf & TX49_CONF_DC) 241 pr_info("TX49XX D-Cache disabled.\n"); 242 } 243 #elif defined(CONFIG_CPU_TX39XX) 244 /* flush all cache on very early stage (before tx39_cache_init) */ 245 static void __init early_flush_dcache(void) 246 { 247 unsigned int conf = read_c0_config(); 248 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> 249 TX39_CONF_DCS_SHIFT)); 250 unsigned int linesz = 16; 251 unsigned long addr, end; 252 253 end = INDEX_BASE + dc_size / 2; 254 /* 2way, waybit=0 */ 255 for (addr = INDEX_BASE; addr < end; addr += linesz) { 256 cache_op(Index_Writeback_Inv_D, addr | 0); 257 cache_op(Index_Writeback_Inv_D, addr | 1); 258 } 259 } 260 261 static void __init txx9_cache_fixup(void) 262 { 263 unsigned int conf; 264 265 conf = read_c0_config(); 266 /* flush and disable */ 267 if (txx9_ic_disable) { 268 conf &= ~TX39_CONF_ICE; 269 write_c0_config(conf); 270 } 271 if (txx9_dc_disable) { 272 early_flush_dcache(); 273 conf &= ~TX39_CONF_DCE; 274 write_c0_config(conf); 275 } 276 277 /* enable cache */ 278 conf = read_c0_config(); 279 if (!txx9_ic_disable) 280 conf |= TX39_CONF_ICE; 281 if (!txx9_dc_disable) 282 conf |= TX39_CONF_DCE; 283 write_c0_config(conf); 284 285 if (!(conf & TX39_CONF_ICE)) 286 pr_info("TX39XX I-Cache disabled.\n"); 287 if (!(conf & TX39_CONF_DCE)) 288 pr_info("TX39XX D-Cache disabled.\n"); 289 } 290 #else 291 static inline void txx9_cache_fixup(void) 292 { 293 } 294 #endif 295 296 static void __init preprocess_cmdline(void) 297 { 298 static char cmdline[COMMAND_LINE_SIZE] __initdata; 299 char *s; 300 301 strcpy(cmdline, arcs_cmdline); 302 s = cmdline; 303 arcs_cmdline[0] = '\0'; 304 while (s && *s) { 305 char *str = strsep(&s, " "); 306 if (strncmp(str, "board=", 6) == 0) { 307 txx9_board_vec = find_board_byname(str + 6); 308 continue; 309 } else if (strncmp(str, "masterclk=", 10) == 0) { 310 unsigned long val; 311 if (strict_strtoul(str + 10, 10, &val) == 0) 312 txx9_master_clock = val; 313 continue; 314 } else if (strcmp(str, "icdisable") == 0) { 315 txx9_ic_disable = 1; 316 continue; 317 } else if (strcmp(str, "dcdisable") == 0) { 318 txx9_dc_disable = 1; 319 continue; 320 } else if (strcmp(str, "toeoff") == 0) { 321 txx9_ccfg_toeon = 0; 322 continue; 323 } else if (strcmp(str, "toeon") == 0) { 324 txx9_ccfg_toeon = 1; 325 continue; 326 } 327 if (arcs_cmdline[0]) 328 strcat(arcs_cmdline, " "); 329 strcat(arcs_cmdline, str); 330 } 331 332 txx9_cache_fixup(); 333 } 334 335 static void __init select_board(void) 336 { 337 const char *envstr; 338 339 /* first, determine by "board=" argument in preprocess_cmdline() */ 340 if (txx9_board_vec) 341 return; 342 /* next, determine by "board" envvar */ 343 envstr = prom_getenv("board"); 344 if (envstr) { 345 txx9_board_vec = find_board_byname(envstr); 346 if (txx9_board_vec) 347 return; 348 } 349 350 /* select "default" board */ 351 #ifdef CONFIG_CPU_TX39XX 352 txx9_board_vec = &jmr3927_vec; 353 #endif 354 #ifdef CONFIG_CPU_TX49XX 355 switch (TX4938_REV_PCODE()) { 356 #ifdef CONFIG_TOSHIBA_RBTX4927 357 case 0x4927: 358 txx9_board_vec = &rbtx4927_vec; 359 break; 360 case 0x4937: 361 txx9_board_vec = &rbtx4937_vec; 362 break; 363 #endif 364 #ifdef CONFIG_TOSHIBA_RBTX4938 365 case 0x4938: 366 txx9_board_vec = &rbtx4938_vec; 367 break; 368 #endif 369 #ifdef CONFIG_TOSHIBA_RBTX4939 370 case 0x4939: 371 txx9_board_vec = &rbtx4939_vec; 372 break; 373 #endif 374 } 375 #endif 376 } 377 378 void __init prom_init(void) 379 { 380 prom_init_cmdline(); 381 preprocess_cmdline(); 382 select_board(); 383 384 strcpy(txx9_system_type, txx9_board_vec->system); 385 386 txx9_board_vec->prom_init(); 387 } 388 389 void __init prom_free_prom_memory(void) 390 { 391 unsigned long saddr = PAGE_SIZE; 392 unsigned long eaddr = __pa_symbol(&_text); 393 394 if (saddr < eaddr) 395 free_init_pages("prom memory", saddr, eaddr); 396 } 397 398 const char *get_system_type(void) 399 { 400 return txx9_system_type; 401 } 402 403 const char *__init prom_getenv(const char *name) 404 { 405 const s32 *str; 406 407 if (fw_arg2 < CKSEG0) 408 return NULL; 409 410 str = (const s32 *)fw_arg2; 411 /* YAMON style ("name", "value" pairs) */ 412 while (str[0] && str[1]) { 413 if (!strcmp((const char *)(unsigned long)str[0], name)) 414 return (const char *)(unsigned long)str[1]; 415 str += 2; 416 } 417 return NULL; 418 } 419 420 static void __noreturn txx9_machine_halt(void) 421 { 422 local_irq_disable(); 423 clear_c0_status(ST0_IM); 424 while (1) { 425 if (cpu_wait) { 426 (*cpu_wait)(); 427 if (cpu_has_counter) { 428 /* 429 * Clear counter interrupt while it 430 * breaks WAIT instruction even if 431 * masked. 432 */ 433 write_c0_compare(0); 434 } 435 } 436 } 437 } 438 439 /* Watchdog support */ 440 void __init txx9_wdt_init(unsigned long base) 441 { 442 struct resource res = { 443 .start = base, 444 .end = base + 0x100 - 1, 445 .flags = IORESOURCE_MEM, 446 }; 447 platform_device_register_simple("txx9wdt", -1, &res, 1); 448 } 449 450 void txx9_wdt_now(unsigned long base) 451 { 452 struct txx9_tmr_reg __iomem *tmrptr = 453 ioremap(base, sizeof(struct txx9_tmr_reg)); 454 /* disable watch dog timer */ 455 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); 456 __raw_writel(0, &tmrptr->tcr); 457 /* kick watchdog */ 458 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); 459 __raw_writel(1, &tmrptr->cpra); /* immediate */ 460 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, 461 &tmrptr->tcr); 462 } 463 464 /* SPI support */ 465 void __init txx9_spi_init(int busid, unsigned long base, int irq) 466 { 467 struct resource res[] = { 468 { 469 .start = base, 470 .end = base + 0x20 - 1, 471 .flags = IORESOURCE_MEM, 472 }, { 473 .start = irq, 474 .flags = IORESOURCE_IRQ, 475 }, 476 }; 477 platform_device_register_simple("spi_txx9", busid, 478 res, ARRAY_SIZE(res)); 479 } 480 481 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) 482 { 483 struct platform_device *pdev = 484 platform_device_alloc("tc35815-mac", id); 485 if (!pdev || 486 platform_device_add_data(pdev, ethaddr, 6) || 487 platform_device_add(pdev)) 488 platform_device_put(pdev); 489 } 490 491 void __init txx9_sio_init(unsigned long baseaddr, int irq, 492 unsigned int line, unsigned int sclk, int nocts) 493 { 494 #ifdef CONFIG_SERIAL_TXX9 495 struct uart_port req; 496 497 memset(&req, 0, sizeof(req)); 498 req.line = line; 499 req.iotype = UPIO_MEM; 500 req.membase = ioremap(baseaddr, 0x24); 501 req.mapbase = baseaddr; 502 req.irq = irq; 503 if (!nocts) 504 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; 505 if (sclk) { 506 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; 507 req.uartclk = sclk; 508 } else 509 req.uartclk = TXX9_IMCLK; 510 early_serial_txx9_setup(&req); 511 #endif /* CONFIG_SERIAL_TXX9 */ 512 } 513 514 #ifdef CONFIG_EARLY_PRINTK 515 static void __init null_prom_putchar(char c) 516 { 517 } 518 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; 519 520 void __init prom_putchar(char c) 521 { 522 txx9_prom_putchar(c); 523 } 524 525 static void __iomem *early_txx9_sio_port; 526 527 static void __init early_txx9_sio_putchar(char c) 528 { 529 #define TXX9_SICISR 0x0c 530 #define TXX9_SITFIFO 0x1c 531 #define TXX9_SICISR_TXALS 0x00000002 532 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & 533 TXX9_SICISR_TXALS)) 534 ; 535 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); 536 } 537 538 void __init txx9_sio_putchar_init(unsigned long baseaddr) 539 { 540 early_txx9_sio_port = ioremap(baseaddr, 0x24); 541 txx9_prom_putchar = early_txx9_sio_putchar; 542 } 543 #endif /* CONFIG_EARLY_PRINTK */ 544 545 /* wrappers */ 546 void __init plat_mem_setup(void) 547 { 548 ioport_resource.start = 0; 549 ioport_resource.end = ~0UL; /* no limit */ 550 iomem_resource.start = 0; 551 iomem_resource.end = ~0UL; /* no limit */ 552 553 /* fallback restart/halt routines */ 554 _machine_restart = (void (*)(char *))txx9_machine_halt; 555 _machine_halt = txx9_machine_halt; 556 pm_power_off = txx9_machine_halt; 557 558 #ifdef CONFIG_PCI 559 pcibios_plat_setup = txx9_pcibios_setup; 560 #endif 561 txx9_board_vec->mem_setup(); 562 } 563 564 void __init arch_init_irq(void) 565 { 566 txx9_board_vec->irq_setup(); 567 } 568 569 void __init plat_time_init(void) 570 { 571 #ifdef CONFIG_CPU_TX49XX 572 mips_hpt_frequency = txx9_cpu_clock / 2; 573 #endif 574 txx9_board_vec->time_init(); 575 } 576 577 static int __init _txx9_arch_init(void) 578 { 579 if (txx9_board_vec->arch_init) 580 txx9_board_vec->arch_init(); 581 return 0; 582 } 583 arch_initcall(_txx9_arch_init); 584 585 static int __init _txx9_device_init(void) 586 { 587 if (txx9_board_vec->device_init) 588 txx9_board_vec->device_init(); 589 return 0; 590 } 591 device_initcall(_txx9_device_init); 592 593 int (*txx9_irq_dispatch)(int pending); 594 asmlinkage void plat_irq_dispatch(void) 595 { 596 int pending = read_c0_status() & read_c0_cause() & ST0_IM; 597 int irq = txx9_irq_dispatch(pending); 598 599 if (likely(irq >= 0)) 600 do_IRQ(irq); 601 else 602 spurious_interrupt(); 603 } 604 605 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ 606 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B 607 static unsigned long __swizzle_addr_none(unsigned long port) 608 { 609 return port; 610 } 611 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; 612 EXPORT_SYMBOL(__swizzle_addr_b); 613 #endif 614 615 #ifdef NEEDS_TXX9_IOSWABW 616 static u16 ioswabw_default(volatile u16 *a, u16 x) 617 { 618 return le16_to_cpu(x); 619 } 620 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) 621 { 622 return x; 623 } 624 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; 625 EXPORT_SYMBOL(ioswabw); 626 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; 627 EXPORT_SYMBOL(__mem_ioswabw); 628 #endif 629 630 void __init txx9_physmap_flash_init(int no, unsigned long addr, 631 unsigned long size, 632 const struct physmap_flash_data *pdata) 633 { 634 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 635 struct resource res = { 636 .start = addr, 637 .end = addr + size - 1, 638 .flags = IORESOURCE_MEM, 639 }; 640 struct platform_device *pdev; 641 #ifdef CONFIG_MTD_PARTITIONS 642 static struct mtd_partition parts[2]; 643 struct physmap_flash_data pdata_part; 644 645 /* If this area contained boot area, make separate partition */ 646 if (pdata->nr_parts == 0 && !pdata->parts && 647 addr < 0x1fc00000 && addr + size > 0x1fc00000 && 648 !parts[0].name) { 649 parts[0].name = "boot"; 650 parts[0].offset = 0x1fc00000 - addr; 651 parts[0].size = addr + size - 0x1fc00000; 652 parts[1].name = "user"; 653 parts[1].offset = 0; 654 parts[1].size = 0x1fc00000 - addr; 655 pdata_part = *pdata; 656 pdata_part.nr_parts = ARRAY_SIZE(parts); 657 pdata_part.parts = parts; 658 pdata = &pdata_part; 659 } 660 #endif 661 pdev = platform_device_alloc("physmap-flash", no); 662 if (!pdev || 663 platform_device_add_resources(pdev, &res, 1) || 664 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 665 platform_device_add(pdev)) 666 platform_device_put(pdev); 667 #endif 668 } 669 670 void __init txx9_ndfmc_init(unsigned long baseaddr, 671 const struct txx9ndfmc_platform_data *pdata) 672 { 673 #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \ 674 defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE) 675 struct resource res = { 676 .start = baseaddr, 677 .end = baseaddr + 0x1000 - 1, 678 .flags = IORESOURCE_MEM, 679 }; 680 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); 681 682 if (!pdev || 683 platform_device_add_resources(pdev, &res, 1) || 684 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 685 platform_device_add(pdev)) 686 platform_device_put(pdev); 687 #endif 688 } 689 690 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 691 static DEFINE_SPINLOCK(txx9_iocled_lock); 692 693 #define TXX9_IOCLED_MAXLEDS 8 694 695 struct txx9_iocled_data { 696 struct gpio_chip chip; 697 u8 cur_val; 698 void __iomem *mmioaddr; 699 struct gpio_led_platform_data pdata; 700 struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; 701 char names[TXX9_IOCLED_MAXLEDS][32]; 702 }; 703 704 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) 705 { 706 struct txx9_iocled_data *data = 707 container_of(chip, struct txx9_iocled_data, chip); 708 return data->cur_val & (1 << offset); 709 } 710 711 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, 712 int value) 713 { 714 struct txx9_iocled_data *data = 715 container_of(chip, struct txx9_iocled_data, chip); 716 unsigned long flags; 717 spin_lock_irqsave(&txx9_iocled_lock, flags); 718 if (value) 719 data->cur_val |= 1 << offset; 720 else 721 data->cur_val &= ~(1 << offset); 722 writeb(data->cur_val, data->mmioaddr); 723 mmiowb(); 724 spin_unlock_irqrestore(&txx9_iocled_lock, flags); 725 } 726 727 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) 728 { 729 return 0; 730 } 731 732 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, 733 int value) 734 { 735 txx9_iocled_set(chip, offset, value); 736 return 0; 737 } 738 739 void __init txx9_iocled_init(unsigned long baseaddr, 740 int basenum, unsigned int num, int lowactive, 741 const char *color, char **deftriggers) 742 { 743 struct txx9_iocled_data *iocled; 744 struct platform_device *pdev; 745 int i; 746 static char *default_triggers[] __initdata = { 747 "heartbeat", 748 "ide-disk", 749 "nand-disk", 750 NULL, 751 }; 752 753 if (!deftriggers) 754 deftriggers = default_triggers; 755 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); 756 if (!iocled) 757 return; 758 iocled->mmioaddr = ioremap(baseaddr, 1); 759 if (!iocled->mmioaddr) 760 goto out_free; 761 iocled->chip.get = txx9_iocled_get; 762 iocled->chip.set = txx9_iocled_set; 763 iocled->chip.direction_input = txx9_iocled_dir_in; 764 iocled->chip.direction_output = txx9_iocled_dir_out; 765 iocled->chip.label = "iocled"; 766 iocled->chip.base = basenum; 767 iocled->chip.ngpio = num; 768 if (gpiochip_add(&iocled->chip)) 769 goto out_unmap; 770 if (basenum < 0) 771 basenum = iocled->chip.base; 772 773 pdev = platform_device_alloc("leds-gpio", basenum); 774 if (!pdev) 775 goto out_gpio; 776 iocled->pdata.num_leds = num; 777 iocled->pdata.leds = iocled->leds; 778 for (i = 0; i < num; i++) { 779 struct gpio_led *led = &iocled->leds[i]; 780 snprintf(iocled->names[i], sizeof(iocled->names[i]), 781 "iocled:%s:%u", color, i); 782 led->name = iocled->names[i]; 783 led->gpio = basenum + i; 784 led->active_low = lowactive; 785 if (deftriggers && *deftriggers) 786 led->default_trigger = *deftriggers++; 787 } 788 pdev->dev.platform_data = &iocled->pdata; 789 if (platform_device_add(pdev)) 790 goto out_pdev; 791 return; 792 out_pdev: 793 platform_device_put(pdev); 794 out_gpio: 795 if (gpiochip_remove(&iocled->chip)) 796 return; 797 out_unmap: 798 iounmap(iocled->mmioaddr); 799 out_free: 800 kfree(iocled); 801 } 802 #else /* CONFIG_LEDS_GPIO */ 803 void __init txx9_iocled_init(unsigned long baseaddr, 804 int basenum, unsigned int num, int lowactive, 805 const char *color, char **deftriggers) 806 { 807 } 808 #endif /* CONFIG_LEDS_GPIO */ 809 810 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, 811 const struct txx9dmac_platform_data *pdata) 812 { 813 #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE) 814 struct resource res[] = { 815 { 816 .start = baseaddr, 817 .end = baseaddr + 0x800 - 1, 818 .flags = IORESOURCE_MEM, 819 #ifndef CONFIG_MACH_TX49XX 820 }, { 821 .start = irq, 822 .flags = IORESOURCE_IRQ, 823 #endif 824 } 825 }; 826 #ifdef CONFIG_MACH_TX49XX 827 struct resource chan_res[] = { 828 { 829 .flags = IORESOURCE_IRQ, 830 } 831 }; 832 #endif 833 struct platform_device *pdev = platform_device_alloc("txx9dmac", id); 834 struct txx9dmac_chan_platform_data cpdata; 835 int i; 836 837 if (!pdev || 838 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 839 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 840 platform_device_add(pdev)) { 841 platform_device_put(pdev); 842 return; 843 } 844 memset(&cpdata, 0, sizeof(cpdata)); 845 cpdata.dmac_dev = pdev; 846 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) { 847 #ifdef CONFIG_MACH_TX49XX 848 chan_res[0].start = irq + i; 849 #endif 850 pdev = platform_device_alloc("txx9dmac-chan", 851 id * TXX9_DMA_MAX_NR_CHANNELS + i); 852 if (!pdev || 853 #ifdef CONFIG_MACH_TX49XX 854 platform_device_add_resources(pdev, chan_res, 855 ARRAY_SIZE(chan_res)) || 856 #endif 857 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) || 858 platform_device_add(pdev)) 859 platform_device_put(pdev); 860 } 861 #endif 862 } 863 864 void __init txx9_aclc_init(unsigned long baseaddr, int irq, 865 unsigned int dmac_id, 866 unsigned int dma_chan_out, 867 unsigned int dma_chan_in) 868 { 869 #if defined(CONFIG_SND_SOC_TXX9ACLC) || \ 870 defined(CONFIG_SND_SOC_TXX9ACLC_MODULE) 871 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; 872 struct resource res[] = { 873 { 874 .start = baseaddr, 875 .end = baseaddr + 0x100 - 1, 876 .flags = IORESOURCE_MEM, 877 }, { 878 .start = irq, 879 .flags = IORESOURCE_IRQ, 880 }, { 881 .name = "txx9dmac-chan", 882 .start = dma_base + dma_chan_out, 883 .flags = IORESOURCE_DMA, 884 }, { 885 .name = "txx9dmac-chan", 886 .start = dma_base + dma_chan_in, 887 .flags = IORESOURCE_DMA, 888 } 889 }; 890 struct platform_device *pdev = 891 platform_device_alloc("txx9aclc-ac97", -1); 892 893 if (!pdev || 894 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 895 platform_device_add(pdev)) 896 platform_device_put(pdev); 897 #endif 898 } 899 900 static struct sysdev_class txx9_sramc_sysdev_class; 901 902 struct txx9_sramc_sysdev { 903 struct sys_device dev; 904 struct bin_attribute bindata_attr; 905 void __iomem *base; 906 }; 907 908 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj, 909 struct bin_attribute *bin_attr, 910 char *buf, loff_t pos, size_t size) 911 { 912 struct txx9_sramc_sysdev *dev = bin_attr->private; 913 size_t ramsize = bin_attr->size; 914 915 if (pos >= ramsize) 916 return 0; 917 if (pos + size > ramsize) 918 size = ramsize - pos; 919 memcpy_fromio(buf, dev->base + pos, size); 920 return size; 921 } 922 923 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj, 924 struct bin_attribute *bin_attr, 925 char *buf, loff_t pos, size_t size) 926 { 927 struct txx9_sramc_sysdev *dev = bin_attr->private; 928 size_t ramsize = bin_attr->size; 929 930 if (pos >= ramsize) 931 return 0; 932 if (pos + size > ramsize) 933 size = ramsize - pos; 934 memcpy_toio(dev->base + pos, buf, size); 935 return size; 936 } 937 938 void __init txx9_sramc_init(struct resource *r) 939 { 940 struct txx9_sramc_sysdev *dev; 941 size_t size; 942 int err; 943 944 if (!txx9_sramc_sysdev_class.name) { 945 txx9_sramc_sysdev_class.name = "txx9_sram"; 946 err = sysdev_class_register(&txx9_sramc_sysdev_class); 947 if (err) { 948 txx9_sramc_sysdev_class.name = NULL; 949 return; 950 } 951 } 952 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 953 if (!dev) 954 return; 955 size = resource_size(r); 956 dev->base = ioremap(r->start, size); 957 if (!dev->base) 958 goto exit; 959 dev->dev.cls = &txx9_sramc_sysdev_class; 960 sysfs_bin_attr_init(&dev->bindata_attr); 961 dev->bindata_attr.attr.name = "bindata"; 962 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; 963 dev->bindata_attr.read = txx9_sram_read; 964 dev->bindata_attr.write = txx9_sram_write; 965 dev->bindata_attr.size = size; 966 dev->bindata_attr.private = dev; 967 err = sysdev_register(&dev->dev); 968 if (err) 969 goto exit; 970 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); 971 if (err) { 972 sysdev_unregister(&dev->dev); 973 goto exit; 974 } 975 return; 976 exit: 977 if (dev) { 978 if (dev->base) 979 iounmap(dev->base); 980 kfree(dev); 981 } 982 } 983