1 /* 2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 3 * and RBTX49xx patch from CELF patch archive. 4 * 5 * 2003-2005 (c) MontaVista Software, Inc. 6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 7 * 8 * This file is subject to the terms and conditions of the GNU General Public 9 * License. See the file "COPYING" in the main directory of this archive 10 * for more details. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/types.h> 15 #include <linux/interrupt.h> 16 #include <linux/string.h> 17 #include <linux/export.h> 18 #include <linux/clk-provider.h> 19 #include <linux/clkdev.h> 20 #include <linux/err.h> 21 #include <linux/gpio/driver.h> 22 #include <linux/platform_device.h> 23 #include <linux/platform_data/txx9/ndfmc.h> 24 #include <linux/serial_core.h> 25 #include <linux/mtd/physmap.h> 26 #include <linux/leds.h> 27 #include <linux/device.h> 28 #include <linux/slab.h> 29 #include <linux/io.h> 30 #include <linux/irq.h> 31 #include <asm/bootinfo.h> 32 #include <asm/idle.h> 33 #include <asm/time.h> 34 #include <asm/reboot.h> 35 #include <asm/r4kcache.h> 36 #include <asm/setup.h> 37 #include <asm/txx9/generic.h> 38 #include <asm/txx9/pci.h> 39 #include <asm/txx9tmr.h> 40 #include <asm/txx9/dmac.h> 41 #ifdef CONFIG_CPU_TX49XX 42 #include <asm/txx9/tx4938.h> 43 #endif 44 45 /* EBUSC settings of TX4927, etc. */ 46 struct resource txx9_ce_res[8]; 47 static char txx9_ce_res_name[8][4]; /* "CEn" */ 48 49 /* pcode, internal register */ 50 unsigned int txx9_pcode; 51 char txx9_pcode_str[8]; 52 static struct resource txx9_reg_res = { 53 .name = txx9_pcode_str, 54 .flags = IORESOURCE_MEM, 55 }; 56 void __init 57 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) 58 { 59 int i; 60 61 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { 62 sprintf(txx9_ce_res_name[i], "CE%d", i); 63 txx9_ce_res[i].flags = IORESOURCE_MEM; 64 txx9_ce_res[i].name = txx9_ce_res_name[i]; 65 } 66 67 txx9_pcode = pcode; 68 sprintf(txx9_pcode_str, "TX%x", pcode); 69 if (base) { 70 txx9_reg_res.start = base & 0xfffffffffULL; 71 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); 72 request_resource(&iomem_resource, &txx9_reg_res); 73 } 74 } 75 76 /* clocks */ 77 unsigned int txx9_master_clock; 78 unsigned int txx9_cpu_clock; 79 unsigned int txx9_gbus_clock; 80 81 #ifdef CONFIG_CPU_TX39XX 82 /* don't enable by default - see errata */ 83 int txx9_ccfg_toeon __initdata; 84 #else 85 int txx9_ccfg_toeon __initdata = 1; 86 #endif 87 88 #define BOARD_VEC(board) extern struct txx9_board_vec board; 89 #include <asm/txx9/boards.h> 90 #undef BOARD_VEC 91 92 struct txx9_board_vec *txx9_board_vec __initdata; 93 static char txx9_system_type[32]; 94 95 static struct txx9_board_vec *board_vecs[] __initdata = { 96 #define BOARD_VEC(board) &board, 97 #include <asm/txx9/boards.h> 98 #undef BOARD_VEC 99 }; 100 101 static struct txx9_board_vec *__init find_board_byname(const char *name) 102 { 103 int i; 104 105 /* search board_vecs table */ 106 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { 107 if (strstr(board_vecs[i]->system, name)) 108 return board_vecs[i]; 109 } 110 return NULL; 111 } 112 113 static void __init prom_init_cmdline(void) 114 { 115 int argc; 116 int *argv32; 117 int i; /* Always ignore the "-c" at argv[0] */ 118 119 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { 120 /* 121 * argc is not a valid number, or argv32 is not a valid 122 * pointer 123 */ 124 argc = 0; 125 argv32 = NULL; 126 } else { 127 argc = (int)fw_arg0; 128 argv32 = (int *)fw_arg1; 129 } 130 131 arcs_cmdline[0] = '\0'; 132 133 for (i = 1; i < argc; i++) { 134 char *str = (char *)(long)argv32[i]; 135 if (i != 1) 136 strcat(arcs_cmdline, " "); 137 if (strchr(str, ' ')) { 138 strcat(arcs_cmdline, "\""); 139 strcat(arcs_cmdline, str); 140 strcat(arcs_cmdline, "\""); 141 } else 142 strcat(arcs_cmdline, str); 143 } 144 } 145 146 static int txx9_ic_disable __initdata; 147 static int txx9_dc_disable __initdata; 148 149 #if defined(CONFIG_CPU_TX49XX) 150 /* flush all cache on very early stage (before 4k_cache_init) */ 151 static void __init early_flush_dcache(void) 152 { 153 unsigned int conf = read_c0_config(); 154 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); 155 unsigned int linesz = 32; 156 unsigned long addr, end; 157 158 end = INDEX_BASE + dc_size / 4; 159 /* 4way, waybit=0 */ 160 for (addr = INDEX_BASE; addr < end; addr += linesz) { 161 cache_op(Index_Writeback_Inv_D, addr | 0); 162 cache_op(Index_Writeback_Inv_D, addr | 1); 163 cache_op(Index_Writeback_Inv_D, addr | 2); 164 cache_op(Index_Writeback_Inv_D, addr | 3); 165 } 166 } 167 168 static void __init txx9_cache_fixup(void) 169 { 170 unsigned int conf; 171 172 conf = read_c0_config(); 173 /* flush and disable */ 174 if (txx9_ic_disable) { 175 conf |= TX49_CONF_IC; 176 write_c0_config(conf); 177 } 178 if (txx9_dc_disable) { 179 early_flush_dcache(); 180 conf |= TX49_CONF_DC; 181 write_c0_config(conf); 182 } 183 184 /* enable cache */ 185 conf = read_c0_config(); 186 if (!txx9_ic_disable) 187 conf &= ~TX49_CONF_IC; 188 if (!txx9_dc_disable) 189 conf &= ~TX49_CONF_DC; 190 write_c0_config(conf); 191 192 if (conf & TX49_CONF_IC) 193 pr_info("TX49XX I-Cache disabled.\n"); 194 if (conf & TX49_CONF_DC) 195 pr_info("TX49XX D-Cache disabled.\n"); 196 } 197 #elif defined(CONFIG_CPU_TX39XX) 198 /* flush all cache on very early stage (before tx39_cache_init) */ 199 static void __init early_flush_dcache(void) 200 { 201 unsigned int conf = read_c0_config(); 202 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> 203 TX39_CONF_DCS_SHIFT)); 204 unsigned int linesz = 16; 205 unsigned long addr, end; 206 207 end = INDEX_BASE + dc_size / 2; 208 /* 2way, waybit=0 */ 209 for (addr = INDEX_BASE; addr < end; addr += linesz) { 210 cache_op(Index_Writeback_Inv_D, addr | 0); 211 cache_op(Index_Writeback_Inv_D, addr | 1); 212 } 213 } 214 215 static void __init txx9_cache_fixup(void) 216 { 217 unsigned int conf; 218 219 conf = read_c0_config(); 220 /* flush and disable */ 221 if (txx9_ic_disable) { 222 conf &= ~TX39_CONF_ICE; 223 write_c0_config(conf); 224 } 225 if (txx9_dc_disable) { 226 early_flush_dcache(); 227 conf &= ~TX39_CONF_DCE; 228 write_c0_config(conf); 229 } 230 231 /* enable cache */ 232 conf = read_c0_config(); 233 if (!txx9_ic_disable) 234 conf |= TX39_CONF_ICE; 235 if (!txx9_dc_disable) 236 conf |= TX39_CONF_DCE; 237 write_c0_config(conf); 238 239 if (!(conf & TX39_CONF_ICE)) 240 pr_info("TX39XX I-Cache disabled.\n"); 241 if (!(conf & TX39_CONF_DCE)) 242 pr_info("TX39XX D-Cache disabled.\n"); 243 } 244 #else 245 static inline void txx9_cache_fixup(void) 246 { 247 } 248 #endif 249 250 static void __init preprocess_cmdline(void) 251 { 252 static char cmdline[COMMAND_LINE_SIZE] __initdata; 253 char *s; 254 255 strcpy(cmdline, arcs_cmdline); 256 s = cmdline; 257 arcs_cmdline[0] = '\0'; 258 while (s && *s) { 259 char *str = strsep(&s, " "); 260 if (strncmp(str, "board=", 6) == 0) { 261 txx9_board_vec = find_board_byname(str + 6); 262 continue; 263 } else if (strncmp(str, "masterclk=", 10) == 0) { 264 unsigned int val; 265 if (kstrtouint(str + 10, 10, &val) == 0) 266 txx9_master_clock = val; 267 continue; 268 } else if (strcmp(str, "icdisable") == 0) { 269 txx9_ic_disable = 1; 270 continue; 271 } else if (strcmp(str, "dcdisable") == 0) { 272 txx9_dc_disable = 1; 273 continue; 274 } else if (strcmp(str, "toeoff") == 0) { 275 txx9_ccfg_toeon = 0; 276 continue; 277 } else if (strcmp(str, "toeon") == 0) { 278 txx9_ccfg_toeon = 1; 279 continue; 280 } 281 if (arcs_cmdline[0]) 282 strcat(arcs_cmdline, " "); 283 strcat(arcs_cmdline, str); 284 } 285 286 txx9_cache_fixup(); 287 } 288 289 static void __init select_board(void) 290 { 291 const char *envstr; 292 293 /* first, determine by "board=" argument in preprocess_cmdline() */ 294 if (txx9_board_vec) 295 return; 296 /* next, determine by "board" envvar */ 297 envstr = prom_getenv("board"); 298 if (envstr) { 299 txx9_board_vec = find_board_byname(envstr); 300 if (txx9_board_vec) 301 return; 302 } 303 304 /* select "default" board */ 305 #ifdef CONFIG_TOSHIBA_JMR3927 306 txx9_board_vec = &jmr3927_vec; 307 #endif 308 #ifdef CONFIG_CPU_TX49XX 309 switch (TX4938_REV_PCODE()) { 310 #ifdef CONFIG_TOSHIBA_RBTX4927 311 case 0x4927: 312 txx9_board_vec = &rbtx4927_vec; 313 break; 314 case 0x4937: 315 txx9_board_vec = &rbtx4937_vec; 316 break; 317 #endif 318 #ifdef CONFIG_TOSHIBA_RBTX4938 319 case 0x4938: 320 txx9_board_vec = &rbtx4938_vec; 321 break; 322 #endif 323 #ifdef CONFIG_TOSHIBA_RBTX4939 324 case 0x4939: 325 txx9_board_vec = &rbtx4939_vec; 326 break; 327 #endif 328 } 329 #endif 330 } 331 332 void __init prom_init(void) 333 { 334 prom_init_cmdline(); 335 preprocess_cmdline(); 336 select_board(); 337 338 strcpy(txx9_system_type, txx9_board_vec->system); 339 340 txx9_board_vec->prom_init(); 341 } 342 343 void __init prom_free_prom_memory(void) 344 { 345 } 346 347 const char *get_system_type(void) 348 { 349 return txx9_system_type; 350 } 351 352 const char *__init prom_getenv(const char *name) 353 { 354 const s32 *str; 355 356 if (fw_arg2 < CKSEG0) 357 return NULL; 358 359 str = (const s32 *)fw_arg2; 360 /* YAMON style ("name", "value" pairs) */ 361 while (str[0] && str[1]) { 362 if (!strcmp((const char *)(unsigned long)str[0], name)) 363 return (const char *)(unsigned long)str[1]; 364 str += 2; 365 } 366 return NULL; 367 } 368 369 static void __noreturn txx9_machine_halt(void) 370 { 371 local_irq_disable(); 372 clear_c0_status(ST0_IM); 373 while (1) { 374 if (cpu_wait) { 375 (*cpu_wait)(); 376 if (cpu_has_counter) { 377 /* 378 * Clear counter interrupt while it 379 * breaks WAIT instruction even if 380 * masked. 381 */ 382 write_c0_compare(0); 383 } 384 } 385 } 386 } 387 388 /* Watchdog support */ 389 void __init txx9_wdt_init(unsigned long base) 390 { 391 struct resource res = { 392 .start = base, 393 .end = base + 0x100 - 1, 394 .flags = IORESOURCE_MEM, 395 }; 396 platform_device_register_simple("txx9wdt", -1, &res, 1); 397 } 398 399 void txx9_wdt_now(unsigned long base) 400 { 401 struct txx9_tmr_reg __iomem *tmrptr = 402 ioremap(base, sizeof(struct txx9_tmr_reg)); 403 /* disable watch dog timer */ 404 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); 405 __raw_writel(0, &tmrptr->tcr); 406 /* kick watchdog */ 407 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); 408 __raw_writel(1, &tmrptr->cpra); /* immediate */ 409 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, 410 &tmrptr->tcr); 411 } 412 413 /* SPI support */ 414 void __init txx9_spi_init(int busid, unsigned long base, int irq) 415 { 416 struct resource res[] = { 417 { 418 .start = base, 419 .end = base + 0x20 - 1, 420 .flags = IORESOURCE_MEM, 421 }, { 422 .start = irq, 423 .flags = IORESOURCE_IRQ, 424 }, 425 }; 426 platform_device_register_simple("spi_txx9", busid, 427 res, ARRAY_SIZE(res)); 428 } 429 430 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) 431 { 432 struct platform_device *pdev = 433 platform_device_alloc("tc35815-mac", id); 434 if (!pdev || 435 platform_device_add_data(pdev, ethaddr, 6) || 436 platform_device_add(pdev)) 437 platform_device_put(pdev); 438 } 439 440 void __init txx9_sio_init(unsigned long baseaddr, int irq, 441 unsigned int line, unsigned int sclk, int nocts) 442 { 443 #ifdef CONFIG_SERIAL_TXX9 444 struct uart_port req; 445 446 memset(&req, 0, sizeof(req)); 447 req.line = line; 448 req.iotype = UPIO_MEM; 449 req.membase = ioremap(baseaddr, 0x24); 450 req.mapbase = baseaddr; 451 req.irq = irq; 452 if (!nocts) 453 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; 454 if (sclk) { 455 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; 456 req.uartclk = sclk; 457 } else 458 req.uartclk = TXX9_IMCLK; 459 early_serial_txx9_setup(&req); 460 #endif /* CONFIG_SERIAL_TXX9 */ 461 } 462 463 #ifdef CONFIG_EARLY_PRINTK 464 static void null_prom_putchar(char c) 465 { 466 } 467 void (*txx9_prom_putchar)(char c) = null_prom_putchar; 468 469 void prom_putchar(char c) 470 { 471 txx9_prom_putchar(c); 472 } 473 474 static void __iomem *early_txx9_sio_port; 475 476 static void early_txx9_sio_putchar(char c) 477 { 478 #define TXX9_SICISR 0x0c 479 #define TXX9_SITFIFO 0x1c 480 #define TXX9_SICISR_TXALS 0x00000002 481 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & 482 TXX9_SICISR_TXALS)) 483 ; 484 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); 485 } 486 487 void __init txx9_sio_putchar_init(unsigned long baseaddr) 488 { 489 early_txx9_sio_port = ioremap(baseaddr, 0x24); 490 txx9_prom_putchar = early_txx9_sio_putchar; 491 } 492 #endif /* CONFIG_EARLY_PRINTK */ 493 494 /* wrappers */ 495 void __init plat_mem_setup(void) 496 { 497 ioport_resource.start = 0; 498 ioport_resource.end = ~0UL; /* no limit */ 499 iomem_resource.start = 0; 500 iomem_resource.end = ~0UL; /* no limit */ 501 502 /* fallback restart/halt routines */ 503 _machine_restart = (void (*)(char *))txx9_machine_halt; 504 _machine_halt = txx9_machine_halt; 505 pm_power_off = txx9_machine_halt; 506 507 #ifdef CONFIG_PCI 508 pcibios_plat_setup = txx9_pcibios_setup; 509 #endif 510 txx9_board_vec->mem_setup(); 511 } 512 513 void __init arch_init_irq(void) 514 { 515 txx9_board_vec->irq_setup(); 516 } 517 518 void __init plat_time_init(void) 519 { 520 #ifdef CONFIG_CPU_TX49XX 521 mips_hpt_frequency = txx9_cpu_clock / 2; 522 #endif 523 txx9_board_vec->time_init(); 524 } 525 526 static void txx9_clk_init(void) 527 { 528 struct clk_hw *hw; 529 int error; 530 531 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock); 532 if (IS_ERR(hw)) { 533 error = PTR_ERR(hw); 534 goto fail; 535 } 536 537 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2); 538 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL); 539 if (error) 540 goto fail; 541 542 #ifdef CONFIG_CPU_TX49XX 543 if (TX4938_REV_PCODE() == 0x4938) { 544 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4); 545 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL); 546 if (error) 547 goto fail; 548 } 549 #endif 550 551 return; 552 553 fail: 554 pr_err("Failed to register clocks: %d\n", error); 555 } 556 557 static int __init _txx9_arch_init(void) 558 { 559 txx9_clk_init(); 560 561 if (txx9_board_vec->arch_init) 562 txx9_board_vec->arch_init(); 563 return 0; 564 } 565 arch_initcall(_txx9_arch_init); 566 567 static int __init _txx9_device_init(void) 568 { 569 if (txx9_board_vec->device_init) 570 txx9_board_vec->device_init(); 571 return 0; 572 } 573 device_initcall(_txx9_device_init); 574 575 int (*txx9_irq_dispatch)(int pending); 576 asmlinkage void plat_irq_dispatch(void) 577 { 578 int pending = read_c0_status() & read_c0_cause() & ST0_IM; 579 int irq = txx9_irq_dispatch(pending); 580 581 if (likely(irq >= 0)) 582 do_IRQ(irq); 583 else 584 spurious_interrupt(); 585 } 586 587 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ 588 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B 589 static unsigned long __swizzle_addr_none(unsigned long port) 590 { 591 return port; 592 } 593 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; 594 EXPORT_SYMBOL(__swizzle_addr_b); 595 #endif 596 597 #ifdef NEEDS_TXX9_IOSWABW 598 static u16 ioswabw_default(volatile u16 *a, u16 x) 599 { 600 return le16_to_cpu(x); 601 } 602 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) 603 { 604 return x; 605 } 606 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; 607 EXPORT_SYMBOL(ioswabw); 608 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; 609 EXPORT_SYMBOL(__mem_ioswabw); 610 #endif 611 612 void __init txx9_physmap_flash_init(int no, unsigned long addr, 613 unsigned long size, 614 const struct physmap_flash_data *pdata) 615 { 616 #if IS_ENABLED(CONFIG_MTD_PHYSMAP) 617 struct resource res = { 618 .start = addr, 619 .end = addr + size - 1, 620 .flags = IORESOURCE_MEM, 621 }; 622 struct platform_device *pdev; 623 static struct mtd_partition parts[2]; 624 struct physmap_flash_data pdata_part; 625 626 /* If this area contained boot area, make separate partition */ 627 if (pdata->nr_parts == 0 && !pdata->parts && 628 addr < 0x1fc00000 && addr + size > 0x1fc00000 && 629 !parts[0].name) { 630 parts[0].name = "boot"; 631 parts[0].offset = 0x1fc00000 - addr; 632 parts[0].size = addr + size - 0x1fc00000; 633 parts[1].name = "user"; 634 parts[1].offset = 0; 635 parts[1].size = 0x1fc00000 - addr; 636 pdata_part = *pdata; 637 pdata_part.nr_parts = ARRAY_SIZE(parts); 638 pdata_part.parts = parts; 639 pdata = &pdata_part; 640 } 641 642 pdev = platform_device_alloc("physmap-flash", no); 643 if (!pdev || 644 platform_device_add_resources(pdev, &res, 1) || 645 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 646 platform_device_add(pdev)) 647 platform_device_put(pdev); 648 #endif 649 } 650 651 void __init txx9_ndfmc_init(unsigned long baseaddr, 652 const struct txx9ndfmc_platform_data *pdata) 653 { 654 #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC) 655 struct resource res = { 656 .start = baseaddr, 657 .end = baseaddr + 0x1000 - 1, 658 .flags = IORESOURCE_MEM, 659 }; 660 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); 661 662 if (!pdev || 663 platform_device_add_resources(pdev, &res, 1) || 664 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 665 platform_device_add(pdev)) 666 platform_device_put(pdev); 667 #endif 668 } 669 670 #if IS_ENABLED(CONFIG_LEDS_GPIO) 671 static DEFINE_SPINLOCK(txx9_iocled_lock); 672 673 #define TXX9_IOCLED_MAXLEDS 8 674 675 struct txx9_iocled_data { 676 struct gpio_chip chip; 677 u8 cur_val; 678 void __iomem *mmioaddr; 679 struct gpio_led_platform_data pdata; 680 struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; 681 char names[TXX9_IOCLED_MAXLEDS][32]; 682 }; 683 684 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) 685 { 686 struct txx9_iocled_data *data = gpiochip_get_data(chip); 687 return !!(data->cur_val & (1 << offset)); 688 } 689 690 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, 691 int value) 692 { 693 struct txx9_iocled_data *data = gpiochip_get_data(chip); 694 unsigned long flags; 695 spin_lock_irqsave(&txx9_iocled_lock, flags); 696 if (value) 697 data->cur_val |= 1 << offset; 698 else 699 data->cur_val &= ~(1 << offset); 700 writeb(data->cur_val, data->mmioaddr); 701 mmiowb(); 702 spin_unlock_irqrestore(&txx9_iocled_lock, flags); 703 } 704 705 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) 706 { 707 return 0; 708 } 709 710 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, 711 int value) 712 { 713 txx9_iocled_set(chip, offset, value); 714 return 0; 715 } 716 717 void __init txx9_iocled_init(unsigned long baseaddr, 718 int basenum, unsigned int num, int lowactive, 719 const char *color, char **deftriggers) 720 { 721 struct txx9_iocled_data *iocled; 722 struct platform_device *pdev; 723 int i; 724 static char *default_triggers[] __initdata = { 725 "heartbeat", 726 "disk-activity", 727 "nand-disk", 728 NULL, 729 }; 730 731 if (!deftriggers) 732 deftriggers = default_triggers; 733 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); 734 if (!iocled) 735 return; 736 iocled->mmioaddr = ioremap(baseaddr, 1); 737 if (!iocled->mmioaddr) 738 goto out_free; 739 iocled->chip.get = txx9_iocled_get; 740 iocled->chip.set = txx9_iocled_set; 741 iocled->chip.direction_input = txx9_iocled_dir_in; 742 iocled->chip.direction_output = txx9_iocled_dir_out; 743 iocled->chip.label = "iocled"; 744 iocled->chip.base = basenum; 745 iocled->chip.ngpio = num; 746 if (gpiochip_add_data(&iocled->chip, iocled)) 747 goto out_unmap; 748 if (basenum < 0) 749 basenum = iocled->chip.base; 750 751 pdev = platform_device_alloc("leds-gpio", basenum); 752 if (!pdev) 753 goto out_gpio; 754 iocled->pdata.num_leds = num; 755 iocled->pdata.leds = iocled->leds; 756 for (i = 0; i < num; i++) { 757 struct gpio_led *led = &iocled->leds[i]; 758 snprintf(iocled->names[i], sizeof(iocled->names[i]), 759 "iocled:%s:%u", color, i); 760 led->name = iocled->names[i]; 761 led->gpio = basenum + i; 762 led->active_low = lowactive; 763 if (deftriggers && *deftriggers) 764 led->default_trigger = *deftriggers++; 765 } 766 pdev->dev.platform_data = &iocled->pdata; 767 if (platform_device_add(pdev)) 768 goto out_pdev; 769 return; 770 771 out_pdev: 772 platform_device_put(pdev); 773 out_gpio: 774 gpiochip_remove(&iocled->chip); 775 out_unmap: 776 iounmap(iocled->mmioaddr); 777 out_free: 778 kfree(iocled); 779 } 780 #else /* CONFIG_LEDS_GPIO */ 781 void __init txx9_iocled_init(unsigned long baseaddr, 782 int basenum, unsigned int num, int lowactive, 783 const char *color, char **deftriggers) 784 { 785 } 786 #endif /* CONFIG_LEDS_GPIO */ 787 788 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, 789 const struct txx9dmac_platform_data *pdata) 790 { 791 #if IS_ENABLED(CONFIG_TXX9_DMAC) 792 struct resource res[] = { 793 { 794 .start = baseaddr, 795 .end = baseaddr + 0x800 - 1, 796 .flags = IORESOURCE_MEM, 797 #ifndef CONFIG_MACH_TX49XX 798 }, { 799 .start = irq, 800 .flags = IORESOURCE_IRQ, 801 #endif 802 } 803 }; 804 #ifdef CONFIG_MACH_TX49XX 805 struct resource chan_res[] = { 806 { 807 .flags = IORESOURCE_IRQ, 808 } 809 }; 810 #endif 811 struct platform_device *pdev = platform_device_alloc("txx9dmac", id); 812 struct txx9dmac_chan_platform_data cpdata; 813 int i; 814 815 if (!pdev || 816 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 817 platform_device_add_data(pdev, pdata, sizeof(*pdata)) || 818 platform_device_add(pdev)) { 819 platform_device_put(pdev); 820 return; 821 } 822 memset(&cpdata, 0, sizeof(cpdata)); 823 cpdata.dmac_dev = pdev; 824 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) { 825 #ifdef CONFIG_MACH_TX49XX 826 chan_res[0].start = irq + i; 827 #endif 828 pdev = platform_device_alloc("txx9dmac-chan", 829 id * TXX9_DMA_MAX_NR_CHANNELS + i); 830 if (!pdev || 831 #ifdef CONFIG_MACH_TX49XX 832 platform_device_add_resources(pdev, chan_res, 833 ARRAY_SIZE(chan_res)) || 834 #endif 835 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) || 836 platform_device_add(pdev)) 837 platform_device_put(pdev); 838 } 839 #endif 840 } 841 842 void __init txx9_aclc_init(unsigned long baseaddr, int irq, 843 unsigned int dmac_id, 844 unsigned int dma_chan_out, 845 unsigned int dma_chan_in) 846 { 847 #if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC) 848 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; 849 struct resource res[] = { 850 { 851 .start = baseaddr, 852 .end = baseaddr + 0x100 - 1, 853 .flags = IORESOURCE_MEM, 854 }, { 855 .start = irq, 856 .flags = IORESOURCE_IRQ, 857 }, { 858 .name = "txx9dmac-chan", 859 .start = dma_base + dma_chan_out, 860 .flags = IORESOURCE_DMA, 861 }, { 862 .name = "txx9dmac-chan", 863 .start = dma_base + dma_chan_in, 864 .flags = IORESOURCE_DMA, 865 } 866 }; 867 struct platform_device *pdev = 868 platform_device_alloc("txx9aclc-ac97", -1); 869 870 if (!pdev || 871 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || 872 platform_device_add(pdev)) 873 platform_device_put(pdev); 874 #endif 875 } 876 877 static struct bus_type txx9_sramc_subsys = { 878 .name = "txx9_sram", 879 .dev_name = "txx9_sram", 880 }; 881 882 struct txx9_sramc_dev { 883 struct device dev; 884 struct bin_attribute bindata_attr; 885 void __iomem *base; 886 }; 887 888 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj, 889 struct bin_attribute *bin_attr, 890 char *buf, loff_t pos, size_t size) 891 { 892 struct txx9_sramc_dev *dev = bin_attr->private; 893 size_t ramsize = bin_attr->size; 894 895 if (pos >= ramsize) 896 return 0; 897 if (pos + size > ramsize) 898 size = ramsize - pos; 899 memcpy_fromio(buf, dev->base + pos, size); 900 return size; 901 } 902 903 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj, 904 struct bin_attribute *bin_attr, 905 char *buf, loff_t pos, size_t size) 906 { 907 struct txx9_sramc_dev *dev = bin_attr->private; 908 size_t ramsize = bin_attr->size; 909 910 if (pos >= ramsize) 911 return 0; 912 if (pos + size > ramsize) 913 size = ramsize - pos; 914 memcpy_toio(dev->base + pos, buf, size); 915 return size; 916 } 917 918 static void txx9_device_release(struct device *dev) 919 { 920 struct txx9_sramc_dev *tdev; 921 922 tdev = container_of(dev, struct txx9_sramc_dev, dev); 923 kfree(tdev); 924 } 925 926 void __init txx9_sramc_init(struct resource *r) 927 { 928 struct txx9_sramc_dev *dev; 929 size_t size; 930 int err; 931 932 err = subsys_system_register(&txx9_sramc_subsys, NULL); 933 if (err) 934 return; 935 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 936 if (!dev) 937 return; 938 size = resource_size(r); 939 dev->base = ioremap(r->start, size); 940 if (!dev->base) { 941 kfree(dev); 942 return; 943 } 944 dev->dev.release = &txx9_device_release; 945 dev->dev.bus = &txx9_sramc_subsys; 946 sysfs_bin_attr_init(&dev->bindata_attr); 947 dev->bindata_attr.attr.name = "bindata"; 948 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; 949 dev->bindata_attr.read = txx9_sram_read; 950 dev->bindata_attr.write = txx9_sram_write; 951 dev->bindata_attr.size = size; 952 dev->bindata_attr.private = dev; 953 err = device_register(&dev->dev); 954 if (err) 955 goto exit_put; 956 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); 957 if (err) { 958 iounmap(dev->base); 959 device_unregister(&dev->dev); 960 } 961 return; 962 exit_put: 963 iounmap(dev->base); 964 put_device(&dev->dev); 965 } 966