1 /* 2 * Copyright (C) 2000,2001,2004 Broadcom Corporation 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 */ 18 19 /* 20 * These are routines to set up and handle interrupts from the 21 * bcm1480 general purpose timer 0. We're using the timer as a 22 * system clock, so we set it up to run at 100 Hz. On every 23 * interrupt, we update our idea of what the time of day is, 24 * then call do_timer() in the architecture-independent kernel 25 * code to do general bookkeeping (e.g. update jiffies, run 26 * bottom halves, etc.) 27 */ 28 #include <linux/clockchips.h> 29 #include <linux/interrupt.h> 30 #include <linux/percpu.h> 31 #include <linux/spinlock.h> 32 33 #include <asm/irq.h> 34 #include <asm/addrspace.h> 35 #include <asm/time.h> 36 #include <asm/io.h> 37 38 #include <asm/sibyte/bcm1480_regs.h> 39 #include <asm/sibyte/sb1250_regs.h> 40 #include <asm/sibyte/bcm1480_int.h> 41 #include <asm/sibyte/bcm1480_scd.h> 42 43 #include <asm/sibyte/sb1250.h> 44 45 46 #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 47 #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 48 #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 49 50 #ifdef CONFIG_SIMULATION 51 #define BCM1480_HPT_VALUE 50000 52 #else 53 #define BCM1480_HPT_VALUE 1000000 54 #endif 55 56 extern int bcm1480_steal_irq(int irq); 57 58 void __init plat_time_init(void) 59 { 60 unsigned int cpu = smp_processor_id(); 61 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; 62 63 BUG_ON(cpu > 3); /* Only have 4 general purpose timers */ 64 65 bcm1480_mask_irq(cpu, irq); 66 67 /* Map the timer interrupt to ip[4] of this cpu */ 68 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) 69 + (irq<<3))); 70 71 bcm1480_unmask_irq(cpu, irq); 72 bcm1480_steal_irq(irq); 73 } 74 75 /* 76 * The general purpose timer ticks at 1 Mhz independent if 77 * the rest of the system 78 */ 79 static void sibyte_set_mode(enum clock_event_mode mode, 80 struct clock_event_device *evt) 81 { 82 unsigned int cpu = smp_processor_id(); 83 void __iomem *timer_cfg, *timer_init; 84 85 timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 86 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 87 88 switch (mode) { 89 case CLOCK_EVT_MODE_PERIODIC: 90 __raw_writeq(0, timer_cfg); 91 __raw_writeq(BCM1480_HPT_VALUE / HZ - 1, timer_init); 92 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 93 timer_cfg); 94 break; 95 96 case CLOCK_EVT_MODE_ONESHOT: 97 /* Stop the timer until we actually program a shot */ 98 case CLOCK_EVT_MODE_SHUTDOWN: 99 __raw_writeq(0, timer_cfg); 100 break; 101 102 case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */ 103 case CLOCK_EVT_MODE_RESUME: 104 ; 105 } 106 } 107 108 static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd) 109 { 110 unsigned int cpu = smp_processor_id(); 111 void __iomem *timer_init; 112 unsigned int cnt; 113 int res; 114 115 timer_init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 116 cnt = __raw_readq(timer_init); 117 cnt += delta; 118 __raw_writeq(cnt, timer_init); 119 res = ((long)(__raw_readq(timer_init) - cnt ) > 0) ? -ETIME : 0; 120 121 return res; 122 } 123 124 static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent); 125 126 static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) 127 { 128 unsigned int cpu = smp_processor_id(); 129 struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu); 130 131 /* Reset the timer */ 132 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 133 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 134 cd->event_handler(cd); 135 136 return IRQ_HANDLED; 137 } 138 139 static struct irqaction sibyte_counter_irqaction = { 140 .handler = sibyte_counter_handler, 141 .flags = IRQF_DISABLED | IRQF_PERCPU, 142 .name = "timer", 143 }; 144 145 /* 146 * This interrupt is "special" in that it doesn't use the request_irq 147 * way to hook the irq line. The timer interrupt is initialized early 148 * enough to make this a major pain, and it's also firing enough to 149 * warrant a bit of special case code. bcm1480_timer_interrupt is 150 * called directly from irq_handler.S when IP[4] is set during an 151 * interrupt 152 */ 153 void __cpuinit sb1480_clockevent_init(void) 154 { 155 unsigned int cpu = smp_processor_id(); 156 unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; 157 struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu); 158 159 cd->name = "bcm1480-counter"; 160 cd->features = CLOCK_EVT_FEAT_PERIODIC | 161 CLOCK_EVT_MODE_ONESHOT; 162 cd->set_next_event = sibyte_next_event; 163 cd->set_mode = sibyte_set_mode; 164 cd->irq = irq; 165 clockevent_set_clock(cd, BCM1480_HPT_VALUE); 166 167 setup_irq(irq, &sibyte_counter_irqaction); 168 } 169 170 static cycle_t bcm1480_hpt_read(void) 171 { 172 /* We assume this function is called xtime_lock held. */ 173 unsigned long count = 174 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); 175 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; 176 } 177 178 struct clocksource bcm1480_clocksource = { 179 .name = "MIPS", 180 .rating = 200, 181 .read = bcm1480_hpt_read, 182 .mask = CLOCKSOURCE_MASK(32), 183 .shift = 32, 184 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 185 }; 186 187 void __init sb1480_clocksource_init(void) 188 { 189 struct clocksource *cs = &bcm1480_clocksource; 190 191 clocksource_set_clock(cs, BCM1480_HPT_VALUE); 192 clocksource_register(cs); 193 } 194 195 void __init bcm1480_hpt_setup(void) 196 { 197 mips_hpt_frequency = BCM1480_HPT_VALUE; 198 sb1480_clocksource_init(); 199 sb1480_clockevent_init(); 200 } 201