1*f137e463SAndrew Isaacson /* 2*f137e463SAndrew Isaacson * Copyright (C) 2001,2002,2004 Broadcom Corporation 3*f137e463SAndrew Isaacson * 4*f137e463SAndrew Isaacson * This program is free software; you can redistribute it and/or 5*f137e463SAndrew Isaacson * modify it under the terms of the GNU General Public License 6*f137e463SAndrew Isaacson * as published by the Free Software Foundation; either version 2 7*f137e463SAndrew Isaacson * of the License, or (at your option) any later version. 8*f137e463SAndrew Isaacson * 9*f137e463SAndrew Isaacson * This program is distributed in the hope that it will be useful, 10*f137e463SAndrew Isaacson * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*f137e463SAndrew Isaacson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*f137e463SAndrew Isaacson * GNU General Public License for more details. 13*f137e463SAndrew Isaacson * 14*f137e463SAndrew Isaacson * You should have received a copy of the GNU General Public License 15*f137e463SAndrew Isaacson * along with this program; if not, write to the Free Software 16*f137e463SAndrew Isaacson * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17*f137e463SAndrew Isaacson */ 18*f137e463SAndrew Isaacson 19*f137e463SAndrew Isaacson #include <linux/init.h> 20*f137e463SAndrew Isaacson #include <linux/delay.h> 21*f137e463SAndrew Isaacson #include <linux/smp.h> 22*f137e463SAndrew Isaacson #include <linux/kernel_stat.h> 23*f137e463SAndrew Isaacson 24*f137e463SAndrew Isaacson #include <asm/mmu_context.h> 25*f137e463SAndrew Isaacson #include <asm/io.h> 26*f137e463SAndrew Isaacson #include <asm/sibyte/sb1250.h> 27*f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_regs.h> 28*f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_int.h> 29*f137e463SAndrew Isaacson 30*f137e463SAndrew Isaacson extern void smp_call_function_interrupt(void); 31*f137e463SAndrew Isaacson 32*f137e463SAndrew Isaacson /* 33*f137e463SAndrew Isaacson * These are routines for dealing with the bcm1480 smp capabilities 34*f137e463SAndrew Isaacson * independent of board/firmware 35*f137e463SAndrew Isaacson */ 36*f137e463SAndrew Isaacson 37*f137e463SAndrew Isaacson static void *mailbox_0_set_regs[] = { 38*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 39*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 40*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 41*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 42*f137e463SAndrew Isaacson }; 43*f137e463SAndrew Isaacson 44*f137e463SAndrew Isaacson static void *mailbox_0_clear_regs[] = { 45*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 46*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 47*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 48*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 49*f137e463SAndrew Isaacson }; 50*f137e463SAndrew Isaacson 51*f137e463SAndrew Isaacson static void *mailbox_0_regs[] = { 52*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 53*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 54*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 55*f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 56*f137e463SAndrew Isaacson }; 57*f137e463SAndrew Isaacson 58*f137e463SAndrew Isaacson /* 59*f137e463SAndrew Isaacson * SMP init and finish on secondary CPUs 60*f137e463SAndrew Isaacson */ 61*f137e463SAndrew Isaacson void bcm1480_smp_init(void) 62*f137e463SAndrew Isaacson { 63*f137e463SAndrew Isaacson unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 | 64*f137e463SAndrew Isaacson STATUSF_IP1 | STATUSF_IP0; 65*f137e463SAndrew Isaacson 66*f137e463SAndrew Isaacson /* Set interrupt mask, but don't enable */ 67*f137e463SAndrew Isaacson change_c0_status(ST0_IM, imask); 68*f137e463SAndrew Isaacson } 69*f137e463SAndrew Isaacson 70*f137e463SAndrew Isaacson void bcm1480_smp_finish(void) 71*f137e463SAndrew Isaacson { 72*f137e463SAndrew Isaacson extern void bcm1480_time_init(void); 73*f137e463SAndrew Isaacson bcm1480_time_init(); 74*f137e463SAndrew Isaacson local_irq_enable(); 75*f137e463SAndrew Isaacson } 76*f137e463SAndrew Isaacson 77*f137e463SAndrew Isaacson /* 78*f137e463SAndrew Isaacson * These are routines for dealing with the sb1250 smp capabilities 79*f137e463SAndrew Isaacson * independent of board/firmware 80*f137e463SAndrew Isaacson */ 81*f137e463SAndrew Isaacson 82*f137e463SAndrew Isaacson /* 83*f137e463SAndrew Isaacson * Simple enough; everything is set up, so just poke the appropriate mailbox 84*f137e463SAndrew Isaacson * register, and we should be set 85*f137e463SAndrew Isaacson */ 86*f137e463SAndrew Isaacson void core_send_ipi(int cpu, unsigned int action) 87*f137e463SAndrew Isaacson { 88*f137e463SAndrew Isaacson __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]); 89*f137e463SAndrew Isaacson } 90*f137e463SAndrew Isaacson 91*f137e463SAndrew Isaacson void bcm1480_mailbox_interrupt(struct pt_regs *regs) 92*f137e463SAndrew Isaacson { 93*f137e463SAndrew Isaacson int cpu = smp_processor_id(); 94*f137e463SAndrew Isaacson unsigned int action; 95*f137e463SAndrew Isaacson 96*f137e463SAndrew Isaacson kstat_this_cpu.irqs[K_BCM1480_INT_MBOX_0_0]++; 97*f137e463SAndrew Isaacson /* Load the mailbox register to figure out what we're supposed to do */ 98*f137e463SAndrew Isaacson action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff; 99*f137e463SAndrew Isaacson 100*f137e463SAndrew Isaacson /* Clear the mailbox to clear the interrupt */ 101*f137e463SAndrew Isaacson __raw_writeq(((u64)action)<<48, mailbox_0_clear_regs[cpu]); 102*f137e463SAndrew Isaacson 103*f137e463SAndrew Isaacson /* 104*f137e463SAndrew Isaacson * Nothing to do for SMP_RESCHEDULE_YOURSELF; returning from the 105*f137e463SAndrew Isaacson * interrupt will do the reschedule for us 106*f137e463SAndrew Isaacson */ 107*f137e463SAndrew Isaacson 108*f137e463SAndrew Isaacson if (action & SMP_CALL_FUNCTION) 109*f137e463SAndrew Isaacson smp_call_function_interrupt(); 110*f137e463SAndrew Isaacson } 111