1f137e463SAndrew Isaacson /* 2f137e463SAndrew Isaacson * Copyright (C) 2001,2002,2004 Broadcom Corporation 3f137e463SAndrew Isaacson * 4f137e463SAndrew Isaacson * This program is free software; you can redistribute it and/or 5f137e463SAndrew Isaacson * modify it under the terms of the GNU General Public License 6f137e463SAndrew Isaacson * as published by the Free Software Foundation; either version 2 7f137e463SAndrew Isaacson * of the License, or (at your option) any later version. 8f137e463SAndrew Isaacson * 9f137e463SAndrew Isaacson * This program is distributed in the hope that it will be useful, 10f137e463SAndrew Isaacson * but WITHOUT ANY WARRANTY; without even the implied warranty of 11f137e463SAndrew Isaacson * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12f137e463SAndrew Isaacson * GNU General Public License for more details. 13f137e463SAndrew Isaacson * 14f137e463SAndrew Isaacson * You should have received a copy of the GNU General Public License 15f137e463SAndrew Isaacson * along with this program; if not, write to the Free Software 16f137e463SAndrew Isaacson * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17f137e463SAndrew Isaacson */ 18f137e463SAndrew Isaacson 19f137e463SAndrew Isaacson #include <linux/init.h> 20f137e463SAndrew Isaacson #include <linux/delay.h> 21f137e463SAndrew Isaacson #include <linux/smp.h> 22f137e463SAndrew Isaacson #include <linux/kernel_stat.h> 23184748ccSPeter Zijlstra #include <linux/sched.h> 24f137e463SAndrew Isaacson 25f137e463SAndrew Isaacson #include <asm/mmu_context.h> 26f137e463SAndrew Isaacson #include <asm/io.h> 2787353d8aSRalf Baechle #include <asm/fw/cfe/cfe_api.h> 28f137e463SAndrew Isaacson #include <asm/sibyte/sb1250.h> 29f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_regs.h> 30f137e463SAndrew Isaacson #include <asm/sibyte/bcm1480_int.h> 31f137e463SAndrew Isaacson 32f137e463SAndrew Isaacson extern void smp_call_function_interrupt(void); 33f137e463SAndrew Isaacson 34f137e463SAndrew Isaacson /* 35f137e463SAndrew Isaacson * These are routines for dealing with the bcm1480 smp capabilities 36f137e463SAndrew Isaacson * independent of board/firmware 37f137e463SAndrew Isaacson */ 38f137e463SAndrew Isaacson 398fb303c7SRalf Baechle static void *mailbox_0_set_regs[] = { 40f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 41f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 42f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 43f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 44f137e463SAndrew Isaacson }; 45f137e463SAndrew Isaacson 468fb303c7SRalf Baechle static void *mailbox_0_clear_regs[] = { 47f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 48f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 49f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 50f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 51f137e463SAndrew Isaacson }; 52f137e463SAndrew Isaacson 538fb303c7SRalf Baechle static void *mailbox_0_regs[] = { 54f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 55f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 56f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 57f137e463SAndrew Isaacson IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 58f137e463SAndrew Isaacson }; 59f137e463SAndrew Isaacson 60f137e463SAndrew Isaacson /* 61f137e463SAndrew Isaacson * SMP init and finish on secondary CPUs 62f137e463SAndrew Isaacson */ 63078a55fcSPaul Gortmaker void bcm1480_smp_init(void) 64f137e463SAndrew Isaacson { 65f137e463SAndrew Isaacson unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 | 66f137e463SAndrew Isaacson STATUSF_IP1 | STATUSF_IP0; 67f137e463SAndrew Isaacson 68f137e463SAndrew Isaacson /* Set interrupt mask, but don't enable */ 69f137e463SAndrew Isaacson change_c0_status(ST0_IM, imask); 70f137e463SAndrew Isaacson } 71f137e463SAndrew Isaacson 72f137e463SAndrew Isaacson /* 73f137e463SAndrew Isaacson * These are routines for dealing with the sb1250 smp capabilities 74f137e463SAndrew Isaacson * independent of board/firmware 75f137e463SAndrew Isaacson */ 76f137e463SAndrew Isaacson 77f137e463SAndrew Isaacson /* 78f137e463SAndrew Isaacson * Simple enough; everything is set up, so just poke the appropriate mailbox 79f137e463SAndrew Isaacson * register, and we should be set 80f137e463SAndrew Isaacson */ 8187353d8aSRalf Baechle static void bcm1480_send_ipi_single(int cpu, unsigned int action) 82f137e463SAndrew Isaacson { 83f137e463SAndrew Isaacson __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]); 84f137e463SAndrew Isaacson } 85f137e463SAndrew Isaacson 8648a048feSRusty Russell static void bcm1480_send_ipi_mask(const struct cpumask *mask, 8748a048feSRusty Russell unsigned int action) 8887353d8aSRalf Baechle { 8987353d8aSRalf Baechle unsigned int i; 9087353d8aSRalf Baechle 9148a048feSRusty Russell for_each_cpu(i, mask) 9287353d8aSRalf Baechle bcm1480_send_ipi_single(i, action); 9387353d8aSRalf Baechle } 9487353d8aSRalf Baechle 9587353d8aSRalf Baechle /* 9687353d8aSRalf Baechle * Code to run on secondary just after probing the CPU 9787353d8aSRalf Baechle */ 98078a55fcSPaul Gortmaker static void bcm1480_init_secondary(void) 9987353d8aSRalf Baechle { 10087353d8aSRalf Baechle extern void bcm1480_smp_init(void); 10187353d8aSRalf Baechle 10287353d8aSRalf Baechle bcm1480_smp_init(); 10387353d8aSRalf Baechle } 10487353d8aSRalf Baechle 10587353d8aSRalf Baechle /* 10687353d8aSRalf Baechle * Do any tidying up before marking online and running the idle 10787353d8aSRalf Baechle * loop 10887353d8aSRalf Baechle */ 109078a55fcSPaul Gortmaker static void bcm1480_smp_finish(void) 11087353d8aSRalf Baechle { 11187353d8aSRalf Baechle extern void sb1480_clockevent_init(void); 11287353d8aSRalf Baechle 11387353d8aSRalf Baechle sb1480_clockevent_init(); 11487353d8aSRalf Baechle local_irq_enable(); 11587353d8aSRalf Baechle } 11687353d8aSRalf Baechle 11787353d8aSRalf Baechle /* 11887353d8aSRalf Baechle * Final cleanup after all secondaries booted 11987353d8aSRalf Baechle */ 12087353d8aSRalf Baechle static void bcm1480_cpus_done(void) 12187353d8aSRalf Baechle { 12287353d8aSRalf Baechle } 12387353d8aSRalf Baechle 12487353d8aSRalf Baechle /* 12587353d8aSRalf Baechle * Setup the PC, SP, and GP of a secondary processor and start it 12687353d8aSRalf Baechle * running! 12787353d8aSRalf Baechle */ 128078a55fcSPaul Gortmaker static void bcm1480_boot_secondary(int cpu, struct task_struct *idle) 12987353d8aSRalf Baechle { 13087353d8aSRalf Baechle int retval; 13187353d8aSRalf Baechle 13287353d8aSRalf Baechle retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap, 13387353d8aSRalf Baechle __KSTK_TOS(idle), 13487353d8aSRalf Baechle (unsigned long)task_thread_info(idle), 0); 13587353d8aSRalf Baechle if (retval != 0) 13687353d8aSRalf Baechle printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval); 13787353d8aSRalf Baechle } 13887353d8aSRalf Baechle 13987353d8aSRalf Baechle /* 14087353d8aSRalf Baechle * Use CFE to find out how many CPUs are available, setting up 1415f054e31SRusty Russell * cpu_possible_mask and the logical/physical mappings. 14287353d8aSRalf Baechle * XXXKW will the boot CPU ever not be physical 0? 14387353d8aSRalf Baechle * 14487353d8aSRalf Baechle * Common setup before any secondaries are started 14587353d8aSRalf Baechle */ 14687353d8aSRalf Baechle static void __init bcm1480_smp_setup(void) 14787353d8aSRalf Baechle { 14887353d8aSRalf Baechle int i, num; 14987353d8aSRalf Baechle 1500b5f9c00SRusty Russell init_cpu_possible(cpumask_of(0)); 15187353d8aSRalf Baechle __cpu_number_map[0] = 0; 15287353d8aSRalf Baechle __cpu_logical_map[0] = 0; 15387353d8aSRalf Baechle 15487353d8aSRalf Baechle for (i = 1, num = 0; i < NR_CPUS; i++) { 15587353d8aSRalf Baechle if (cfe_cpu_stop(i) == 0) { 1560b5f9c00SRusty Russell set_cpu_possible(i, true); 15787353d8aSRalf Baechle __cpu_number_map[i] = ++num; 15887353d8aSRalf Baechle __cpu_logical_map[num] = i; 15987353d8aSRalf Baechle } 16087353d8aSRalf Baechle } 16187353d8aSRalf Baechle printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num); 16287353d8aSRalf Baechle } 16387353d8aSRalf Baechle 16487353d8aSRalf Baechle static void __init bcm1480_prepare_cpus(unsigned int max_cpus) 16587353d8aSRalf Baechle { 16687353d8aSRalf Baechle } 16787353d8aSRalf Baechle 16887353d8aSRalf Baechle struct plat_smp_ops bcm1480_smp_ops = { 16987353d8aSRalf Baechle .send_ipi_single = bcm1480_send_ipi_single, 17087353d8aSRalf Baechle .send_ipi_mask = bcm1480_send_ipi_mask, 17187353d8aSRalf Baechle .init_secondary = bcm1480_init_secondary, 17287353d8aSRalf Baechle .smp_finish = bcm1480_smp_finish, 17387353d8aSRalf Baechle .cpus_done = bcm1480_cpus_done, 17487353d8aSRalf Baechle .boot_secondary = bcm1480_boot_secondary, 17587353d8aSRalf Baechle .smp_setup = bcm1480_smp_setup, 17687353d8aSRalf Baechle .prepare_cpus = bcm1480_prepare_cpus, 17787353d8aSRalf Baechle }; 17887353d8aSRalf Baechle 179937a8015SRalf Baechle void bcm1480_mailbox_interrupt(void) 180f137e463SAndrew Isaacson { 181f137e463SAndrew Isaacson int cpu = smp_processor_id(); 182d2287f5eSMike Travis int irq = K_BCM1480_INT_MBOX_0_0; 183f137e463SAndrew Isaacson unsigned int action; 184f137e463SAndrew Isaacson 185*310ff2c8SThomas Gleixner kstat_incr_irq_this_cpu(irq); 186f137e463SAndrew Isaacson /* Load the mailbox register to figure out what we're supposed to do */ 187f137e463SAndrew Isaacson action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff; 188f137e463SAndrew Isaacson 189f137e463SAndrew Isaacson /* Clear the mailbox to clear the interrupt */ 190f137e463SAndrew Isaacson __raw_writeq(((u64)action)<<48, mailbox_0_clear_regs[cpu]); 191f137e463SAndrew Isaacson 192184748ccSPeter Zijlstra if (action & SMP_RESCHEDULE_YOURSELF) 193184748ccSPeter Zijlstra scheduler_ipi(); 194f137e463SAndrew Isaacson 195f137e463SAndrew Isaacson if (action & SMP_CALL_FUNCTION) 196f137e463SAndrew Isaacson smp_call_function_interrupt(); 197f137e463SAndrew Isaacson } 198