138b18f72SRalf Baechleconfig SIBYTE_SB1250 238b18f72SRalf Baechle bool 338b18f72SRalf Baechle select HW_HAS_PCI 4ca6f5494SRalf Baechle select SIBYTE_ENABLE_LDT_IF_PCI 5d619f38fSMark Mason select SIBYTE_HAS_ZBUS_PROFILING 638b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 7e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 838b18f72SRalf Baechle 938b18f72SRalf Baechleconfig SIBYTE_BCM1120 1038b18f72SRalf Baechle bool 1138b18f72SRalf Baechle select SIBYTE_BCM112X 12bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 1338b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 1438b18f72SRalf Baechle 1538b18f72SRalf Baechleconfig SIBYTE_BCM1125 1638b18f72SRalf Baechle bool 1738b18f72SRalf Baechle select HW_HAS_PCI 1838b18f72SRalf Baechle select SIBYTE_BCM112X 19bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 2038b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2138b18f72SRalf Baechle 2238b18f72SRalf Baechleconfig SIBYTE_BCM1125H 2338b18f72SRalf Baechle bool 2438b18f72SRalf Baechle select HW_HAS_PCI 2538b18f72SRalf Baechle select SIBYTE_BCM112X 26ca6f5494SRalf Baechle select SIBYTE_ENABLE_LDT_IF_PCI 27bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 2838b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2938b18f72SRalf Baechle 3038b18f72SRalf Baechleconfig SIBYTE_BCM112X 3138b18f72SRalf Baechle bool 3238b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 33bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 3438b18f72SRalf Baechle 35f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x80 36f137e463SAndrew Isaacson bool 37f137e463SAndrew Isaacson select HW_HAS_PCI 38d619f38fSMark Mason select SIBYTE_HAS_ZBUS_PROFILING 39f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 40e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 41f137e463SAndrew Isaacson 42f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x55 43f137e463SAndrew Isaacson bool 44f137e463SAndrew Isaacson select HW_HAS_PCI 45f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 46bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 47e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 48f137e463SAndrew Isaacson 4938b18f72SRalf Baechleconfig SIBYTE_SB1xxx_SOC 5038b18f72SRalf Baechle bool 5138b18f72SRalf Baechle select DMA_COHERENT 5238b18f72SRalf Baechle select SIBYTE_CFE 5338b18f72SRalf Baechle select SWAP_IO_SPACE 5438b18f72SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 5538b18f72SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 5638b18f72SRalf Baechle 5738b18f72SRalf Baechlechoice 5838b18f72SRalf Baechle prompt "SiByte SOC Stepping" 5938b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 6038b18f72SRalf Baechle 6138b18f72SRalf Baechleconfig CPU_SB1_PASS_1 6238b18f72SRalf Baechle bool "1250 Pass1" 6338b18f72SRalf Baechle depends on SIBYTE_SB1250 6438b18f72SRalf Baechle select CPU_HAS_PREFETCH 6538b18f72SRalf Baechle 6638b18f72SRalf Baechleconfig CPU_SB1_PASS_2_1250 6738b18f72SRalf Baechle bool "1250 An" 6838b18f72SRalf Baechle depends on SIBYTE_SB1250 6938b18f72SRalf Baechle select CPU_SB1_PASS_2 7038b18f72SRalf Baechle help 7138b18f72SRalf Baechle Also called BCM1250 Pass 2 7238b18f72SRalf Baechle 7338b18f72SRalf Baechleconfig CPU_SB1_PASS_2_2 7438b18f72SRalf Baechle bool "1250 Bn" 7538b18f72SRalf Baechle depends on SIBYTE_SB1250 7638b18f72SRalf Baechle select CPU_HAS_PREFETCH 7738b18f72SRalf Baechle help 7838b18f72SRalf Baechle Also called BCM1250 Pass 2.2 7938b18f72SRalf Baechle 8038b18f72SRalf Baechleconfig CPU_SB1_PASS_4 8138b18f72SRalf Baechle bool "1250 Cn" 8238b18f72SRalf Baechle depends on SIBYTE_SB1250 8338b18f72SRalf Baechle select CPU_HAS_PREFETCH 8438b18f72SRalf Baechle help 8538b18f72SRalf Baechle Also called BCM1250 Pass 3 8638b18f72SRalf Baechle 8738b18f72SRalf Baechleconfig CPU_SB1_PASS_2_112x 8838b18f72SRalf Baechle bool "112x Hybrid" 8938b18f72SRalf Baechle depends on SIBYTE_BCM112X 9038b18f72SRalf Baechle select CPU_SB1_PASS_2 9138b18f72SRalf Baechle 9238b18f72SRalf Baechleconfig CPU_SB1_PASS_3 9338b18f72SRalf Baechle bool "112x An" 9438b18f72SRalf Baechle depends on SIBYTE_BCM112X 9538b18f72SRalf Baechle select CPU_HAS_PREFETCH 9638b18f72SRalf Baechle 9738b18f72SRalf Baechleendchoice 9838b18f72SRalf Baechle 9938b18f72SRalf Baechleconfig CPU_SB1_PASS_2 10038b18f72SRalf Baechle bool 10138b18f72SRalf Baechle 10238b18f72SRalf Baechleconfig SIBYTE_HAS_LDT 10338b18f72SRalf Baechle bool 104ca6f5494SRalf Baechle 105ca6f5494SRalf Baechleconfig SIBYTE_ENABLE_LDT_IF_PCI 106ca6f5494SRalf Baechle bool 107ca6f5494SRalf Baechle select SIBYTE_HAS_LDT if PCI 10838b18f72SRalf Baechle 10938b18f72SRalf Baechleconfig SIMULATION 11038b18f72SRalf Baechle bool "Running under simulation" 11138b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 11238b18f72SRalf Baechle help 11338b18f72SRalf Baechle Build a kernel suitable for running under the GDB simulator. 11438b18f72SRalf Baechle Primarily adjusts the kernel's notion of time. 11538b18f72SRalf Baechle 11677607635SRalf Baechleconfig SB1_CEX_ALWAYS_FATAL 117a4b5bd9aSAndrew Isaacson bool "All cache exceptions considered fatal (no recovery attempted)" 118a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 119a4b5bd9aSAndrew Isaacson 12077607635SRalf Baechleconfig SB1_CERR_STALL 121a4b5bd9aSAndrew Isaacson bool "Stall (rather than panic) on fatal cache error" 122a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 123a4b5bd9aSAndrew Isaacson 12438b18f72SRalf Baechleconfig SIBYTE_CFE 12538b18f72SRalf Baechle bool "Booting from CFE" 12638b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 127*df78b5c8SAurelien Jarno select CFE 12836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 12938b18f72SRalf Baechle help 13038b18f72SRalf Baechle Make use of the CFE API for enumerating available memory, 13138b18f72SRalf Baechle controlling secondary CPUs, and possibly console output. 13238b18f72SRalf Baechle 13338b18f72SRalf Baechleconfig SIBYTE_CFE_CONSOLE 13438b18f72SRalf Baechle bool "Use firmware console" 13538b18f72SRalf Baechle depends on SIBYTE_CFE 13638b18f72SRalf Baechle help 13738b18f72SRalf Baechle Use the CFE API's console write routines during boot. Other console 13838b18f72SRalf Baechle options (VT console, sb1250 duart console, etc.) should not be 13938b18f72SRalf Baechle configured. 14038b18f72SRalf Baechle 14138b18f72SRalf Baechleconfig SIBYTE_STANDALONE 14238b18f72SRalf Baechle bool 14338b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE 14436a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 14538b18f72SRalf Baechle default y 14638b18f72SRalf Baechle 14738b18f72SRalf Baechleconfig SIBYTE_STANDALONE_RAM_SIZE 14838b18f72SRalf Baechle int "Memory size (in megabytes)" 14938b18f72SRalf Baechle depends on SIBYTE_STANDALONE 15038b18f72SRalf Baechle default "32" 15138b18f72SRalf Baechle 15238b18f72SRalf Baechleconfig SIBYTE_BUS_WATCHER 15338b18f72SRalf Baechle bool "Support for Bus Watcher statistics" 15438b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 15538b18f72SRalf Baechle help 15638b18f72SRalf Baechle Handle and keep statistics on the bus error interrupts (COR_ECC, 15738b18f72SRalf Baechle BAD_ECC, IO_BUS). 15838b18f72SRalf Baechle 15938b18f72SRalf Baechleconfig SIBYTE_BW_TRACE 16038b18f72SRalf Baechle bool "Capture bus trace before bus error" 16138b18f72SRalf Baechle depends on SIBYTE_BUS_WATCHER 16238b18f72SRalf Baechle help 16338b18f72SRalf Baechle Run a continuous bus trace, dumping the raw data as soon as 16438b18f72SRalf Baechle a ZBbus error is detected. Cannot work if ZBbus profiling 16538b18f72SRalf Baechle is turned on, and also will interfere with JTAG-based trace 16638b18f72SRalf Baechle buffer activity. Raw buffer data is dumped to console, and 16738b18f72SRalf Baechle must be processed off-line. 16838b18f72SRalf Baechle 16938b18f72SRalf Baechleconfig SIBYTE_SB1250_PROF 17038b18f72SRalf Baechle bool "Support for SB1/SOC profiling - SB1/SCD perf counters" 17138b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 17238b18f72SRalf Baechle 17338b18f72SRalf Baechleconfig SIBYTE_TBPROF 174bb9b813bSRalf Baechle tristate "Support for ZBbus profiling" 175bb9b813bSRalf Baechle depends on SIBYTE_HAS_ZBUS_PROFILING 176bb9b813bSRalf Baechle 177bb9b813bSRalf Baechleconfig SIBYTE_HAS_ZBUS_PROFILING 178bb9b813bSRalf Baechle bool 179