138b18f72SRalf Baechleconfig SIBYTE_SB1250 238b18f72SRalf Baechle bool 338b18f72SRalf Baechle select HW_HAS_PCI 4ca6f5494SRalf Baechle select SIBYTE_ENABLE_LDT_IF_PCI 538b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 6e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 738b18f72SRalf Baechle 838b18f72SRalf Baechleconfig SIBYTE_BCM1120 938b18f72SRalf Baechle bool 1038b18f72SRalf Baechle select SIBYTE_BCM112X 11*bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 1238b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 1338b18f72SRalf Baechle 1438b18f72SRalf Baechleconfig SIBYTE_BCM1125 1538b18f72SRalf Baechle bool 1638b18f72SRalf Baechle select HW_HAS_PCI 1738b18f72SRalf Baechle select SIBYTE_BCM112X 18*bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 1938b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2038b18f72SRalf Baechle 2138b18f72SRalf Baechleconfig SIBYTE_BCM1125H 2238b18f72SRalf Baechle bool 2338b18f72SRalf Baechle select HW_HAS_PCI 2438b18f72SRalf Baechle select SIBYTE_BCM112X 25ca6f5494SRalf Baechle select SIBYTE_ENABLE_LDT_IF_PCI 26*bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 2738b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2838b18f72SRalf Baechle 2938b18f72SRalf Baechleconfig SIBYTE_BCM112X 3038b18f72SRalf Baechle bool 3138b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 32*bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 3338b18f72SRalf Baechle 34f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x80 35f137e463SAndrew Isaacson bool 36f137e463SAndrew Isaacson select HW_HAS_PCI 37f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 38e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 39f137e463SAndrew Isaacson 40f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x55 41f137e463SAndrew Isaacson bool 42f137e463SAndrew Isaacson select HW_HAS_PCI 43f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 44*bb9b813bSRalf Baechle select SIBYTE_HAS_ZBUS_PROFILING 45e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 46f137e463SAndrew Isaacson 4738b18f72SRalf Baechleconfig SIBYTE_SB1xxx_SOC 4838b18f72SRalf Baechle bool 4938b18f72SRalf Baechle depends on EXPERIMENTAL 5038b18f72SRalf Baechle select DMA_COHERENT 5138b18f72SRalf Baechle select SIBYTE_CFE 5238b18f72SRalf Baechle select SWAP_IO_SPACE 5338b18f72SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 5438b18f72SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 5538b18f72SRalf Baechle 5638b18f72SRalf Baechlechoice 5738b18f72SRalf Baechle prompt "SiByte SOC Stepping" 5838b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 5938b18f72SRalf Baechle 6038b18f72SRalf Baechleconfig CPU_SB1_PASS_1 6138b18f72SRalf Baechle bool "1250 Pass1" 6238b18f72SRalf Baechle depends on SIBYTE_SB1250 6338b18f72SRalf Baechle select CPU_HAS_PREFETCH 6438b18f72SRalf Baechle 6538b18f72SRalf Baechleconfig CPU_SB1_PASS_2_1250 6638b18f72SRalf Baechle bool "1250 An" 6738b18f72SRalf Baechle depends on SIBYTE_SB1250 6838b18f72SRalf Baechle select CPU_SB1_PASS_2 6938b18f72SRalf Baechle help 7038b18f72SRalf Baechle Also called BCM1250 Pass 2 7138b18f72SRalf Baechle 7238b18f72SRalf Baechleconfig CPU_SB1_PASS_2_2 7338b18f72SRalf Baechle bool "1250 Bn" 7438b18f72SRalf Baechle depends on SIBYTE_SB1250 7538b18f72SRalf Baechle select CPU_HAS_PREFETCH 7638b18f72SRalf Baechle help 7738b18f72SRalf Baechle Also called BCM1250 Pass 2.2 7838b18f72SRalf Baechle 7938b18f72SRalf Baechleconfig CPU_SB1_PASS_4 8038b18f72SRalf Baechle bool "1250 Cn" 8138b18f72SRalf Baechle depends on SIBYTE_SB1250 8238b18f72SRalf Baechle select CPU_HAS_PREFETCH 8338b18f72SRalf Baechle help 8438b18f72SRalf Baechle Also called BCM1250 Pass 3 8538b18f72SRalf Baechle 8638b18f72SRalf Baechleconfig CPU_SB1_PASS_2_112x 8738b18f72SRalf Baechle bool "112x Hybrid" 8838b18f72SRalf Baechle depends on SIBYTE_BCM112X 8938b18f72SRalf Baechle select CPU_SB1_PASS_2 9038b18f72SRalf Baechle 9138b18f72SRalf Baechleconfig CPU_SB1_PASS_3 9238b18f72SRalf Baechle bool "112x An" 9338b18f72SRalf Baechle depends on SIBYTE_BCM112X 9438b18f72SRalf Baechle select CPU_HAS_PREFETCH 9538b18f72SRalf Baechle 9638b18f72SRalf Baechleendchoice 9738b18f72SRalf Baechle 9838b18f72SRalf Baechleconfig CPU_SB1_PASS_2 9938b18f72SRalf Baechle bool 10038b18f72SRalf Baechle 10138b18f72SRalf Baechleconfig SIBYTE_HAS_LDT 10238b18f72SRalf Baechle bool 103ca6f5494SRalf Baechle 104ca6f5494SRalf Baechleconfig SIBYTE_ENABLE_LDT_IF_PCI 105ca6f5494SRalf Baechle bool 106ca6f5494SRalf Baechle select SIBYTE_HAS_LDT if PCI 10738b18f72SRalf Baechle 10838b18f72SRalf Baechleconfig SIMULATION 10938b18f72SRalf Baechle bool "Running under simulation" 11038b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 11138b18f72SRalf Baechle help 11238b18f72SRalf Baechle Build a kernel suitable for running under the GDB simulator. 11338b18f72SRalf Baechle Primarily adjusts the kernel's notion of time. 11438b18f72SRalf Baechle 11577607635SRalf Baechleconfig SB1_CEX_ALWAYS_FATAL 116a4b5bd9aSAndrew Isaacson bool "All cache exceptions considered fatal (no recovery attempted)" 117a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 118a4b5bd9aSAndrew Isaacson 11977607635SRalf Baechleconfig SB1_CERR_STALL 120a4b5bd9aSAndrew Isaacson bool "Stall (rather than panic) on fatal cache error" 121a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 122a4b5bd9aSAndrew Isaacson 12338b18f72SRalf Baechleconfig SIBYTE_CFE 12438b18f72SRalf Baechle bool "Booting from CFE" 12538b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 12636a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 12738b18f72SRalf Baechle help 12838b18f72SRalf Baechle Make use of the CFE API for enumerating available memory, 12938b18f72SRalf Baechle controlling secondary CPUs, and possibly console output. 13038b18f72SRalf Baechle 13138b18f72SRalf Baechleconfig SIBYTE_CFE_CONSOLE 13238b18f72SRalf Baechle bool "Use firmware console" 13338b18f72SRalf Baechle depends on SIBYTE_CFE 13438b18f72SRalf Baechle help 13538b18f72SRalf Baechle Use the CFE API's console write routines during boot. Other console 13638b18f72SRalf Baechle options (VT console, sb1250 duart console, etc.) should not be 13738b18f72SRalf Baechle configured. 13838b18f72SRalf Baechle 13938b18f72SRalf Baechleconfig SIBYTE_STANDALONE 14038b18f72SRalf Baechle bool 14138b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE 14236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 14338b18f72SRalf Baechle default y 14438b18f72SRalf Baechle 14538b18f72SRalf Baechleconfig SIBYTE_STANDALONE_RAM_SIZE 14638b18f72SRalf Baechle int "Memory size (in megabytes)" 14738b18f72SRalf Baechle depends on SIBYTE_STANDALONE 14838b18f72SRalf Baechle default "32" 14938b18f72SRalf Baechle 15038b18f72SRalf Baechleconfig SIBYTE_BUS_WATCHER 15138b18f72SRalf Baechle bool "Support for Bus Watcher statistics" 15238b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 15338b18f72SRalf Baechle help 15438b18f72SRalf Baechle Handle and keep statistics on the bus error interrupts (COR_ECC, 15538b18f72SRalf Baechle BAD_ECC, IO_BUS). 15638b18f72SRalf Baechle 15738b18f72SRalf Baechleconfig SIBYTE_BW_TRACE 15838b18f72SRalf Baechle bool "Capture bus trace before bus error" 15938b18f72SRalf Baechle depends on SIBYTE_BUS_WATCHER 16038b18f72SRalf Baechle help 16138b18f72SRalf Baechle Run a continuous bus trace, dumping the raw data as soon as 16238b18f72SRalf Baechle a ZBbus error is detected. Cannot work if ZBbus profiling 16338b18f72SRalf Baechle is turned on, and also will interfere with JTAG-based trace 16438b18f72SRalf Baechle buffer activity. Raw buffer data is dumped to console, and 16538b18f72SRalf Baechle must be processed off-line. 16638b18f72SRalf Baechle 16738b18f72SRalf Baechleconfig SIBYTE_SB1250_PROF 16838b18f72SRalf Baechle bool "Support for SB1/SOC profiling - SB1/SCD perf counters" 16938b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 17038b18f72SRalf Baechle 17138b18f72SRalf Baechleconfig SIBYTE_TBPROF 172*bb9b813bSRalf Baechle tristate "Support for ZBbus profiling" 173*bb9b813bSRalf Baechle depends on SIBYTE_HAS_ZBUS_PROFILING 174*bb9b813bSRalf Baechle 175*bb9b813bSRalf Baechleconfig SIBYTE_HAS_ZBUS_PROFILING 176*bb9b813bSRalf Baechle bool 177