xref: /linux/arch/mips/sibyte/Kconfig (revision 38b18f72587422450bd01695b471b3ae2ff4b169)
1*38b18f72SRalf Baechleconfig SIBYTE_SB1250
2*38b18f72SRalf Baechle	bool
3*38b18f72SRalf Baechle	select HW_HAS_PCI
4*38b18f72SRalf Baechle	select SIBYTE_HAS_LDT
5*38b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
6*38b18f72SRalf Baechle
7*38b18f72SRalf Baechleconfig SIBYTE_BCM1120
8*38b18f72SRalf Baechle	bool
9*38b18f72SRalf Baechle	select SIBYTE_BCM112X
10*38b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
11*38b18f72SRalf Baechle
12*38b18f72SRalf Baechleconfig SIBYTE_BCM1125
13*38b18f72SRalf Baechle	bool
14*38b18f72SRalf Baechle	select HW_HAS_PCI
15*38b18f72SRalf Baechle	select SIBYTE_BCM112X
16*38b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
17*38b18f72SRalf Baechle
18*38b18f72SRalf Baechleconfig SIBYTE_BCM1125H
19*38b18f72SRalf Baechle	bool
20*38b18f72SRalf Baechle	select HW_HAS_PCI
21*38b18f72SRalf Baechle	select SIBYTE_BCM112X
22*38b18f72SRalf Baechle	select SIBYTE_HAS_LDT
23*38b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
24*38b18f72SRalf Baechle
25*38b18f72SRalf Baechleconfig SIBYTE_BCM112X
26*38b18f72SRalf Baechle	bool
27*38b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
28*38b18f72SRalf Baechle
29*38b18f72SRalf Baechleconfig SIBYTE_SB1xxx_SOC
30*38b18f72SRalf Baechle	bool
31*38b18f72SRalf Baechle	depends on EXPERIMENTAL
32*38b18f72SRalf Baechle	select DMA_COHERENT
33*38b18f72SRalf Baechle	select SIBYTE_CFE
34*38b18f72SRalf Baechle	select SWAP_IO_SPACE
35*38b18f72SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
36*38b18f72SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
37*38b18f72SRalf Baechle
38*38b18f72SRalf Baechlechoice
39*38b18f72SRalf Baechle	prompt "SiByte SOC Stepping"
40*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
41*38b18f72SRalf Baechle
42*38b18f72SRalf Baechleconfig CPU_SB1_PASS_1
43*38b18f72SRalf Baechle	bool "1250 Pass1"
44*38b18f72SRalf Baechle	depends on SIBYTE_SB1250
45*38b18f72SRalf Baechle	select CPU_HAS_PREFETCH
46*38b18f72SRalf Baechle
47*38b18f72SRalf Baechleconfig CPU_SB1_PASS_2_1250
48*38b18f72SRalf Baechle	bool "1250 An"
49*38b18f72SRalf Baechle	depends on SIBYTE_SB1250
50*38b18f72SRalf Baechle	select CPU_SB1_PASS_2
51*38b18f72SRalf Baechle	help
52*38b18f72SRalf Baechle	  Also called BCM1250 Pass 2
53*38b18f72SRalf Baechle
54*38b18f72SRalf Baechleconfig CPU_SB1_PASS_2_2
55*38b18f72SRalf Baechle	bool "1250 Bn"
56*38b18f72SRalf Baechle	depends on SIBYTE_SB1250
57*38b18f72SRalf Baechle	select CPU_HAS_PREFETCH
58*38b18f72SRalf Baechle	help
59*38b18f72SRalf Baechle	  Also called BCM1250 Pass 2.2
60*38b18f72SRalf Baechle
61*38b18f72SRalf Baechleconfig CPU_SB1_PASS_4
62*38b18f72SRalf Baechle	bool "1250 Cn"
63*38b18f72SRalf Baechle	depends on SIBYTE_SB1250
64*38b18f72SRalf Baechle	select CPU_HAS_PREFETCH
65*38b18f72SRalf Baechle	help
66*38b18f72SRalf Baechle	  Also called BCM1250 Pass 3
67*38b18f72SRalf Baechle
68*38b18f72SRalf Baechleconfig CPU_SB1_PASS_2_112x
69*38b18f72SRalf Baechle	bool "112x Hybrid"
70*38b18f72SRalf Baechle	depends on SIBYTE_BCM112X
71*38b18f72SRalf Baechle	select CPU_SB1_PASS_2
72*38b18f72SRalf Baechle
73*38b18f72SRalf Baechleconfig CPU_SB1_PASS_3
74*38b18f72SRalf Baechle	bool "112x An"
75*38b18f72SRalf Baechle	depends on SIBYTE_BCM112X
76*38b18f72SRalf Baechle	select CPU_HAS_PREFETCH
77*38b18f72SRalf Baechle
78*38b18f72SRalf Baechleendchoice
79*38b18f72SRalf Baechle
80*38b18f72SRalf Baechleconfig CPU_SB1_PASS_2
81*38b18f72SRalf Baechle	bool
82*38b18f72SRalf Baechle
83*38b18f72SRalf Baechleconfig SIBYTE_HAS_LDT
84*38b18f72SRalf Baechle	bool
85*38b18f72SRalf Baechle	depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
86*38b18f72SRalf Baechle	default y
87*38b18f72SRalf Baechle
88*38b18f72SRalf Baechleconfig SIMULATION
89*38b18f72SRalf Baechle	bool "Running under simulation"
90*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
91*38b18f72SRalf Baechle	help
92*38b18f72SRalf Baechle	  Build a kernel suitable for running under the GDB simulator.
93*38b18f72SRalf Baechle	  Primarily adjusts the kernel's notion of time.
94*38b18f72SRalf Baechle
95*38b18f72SRalf Baechleconfig SIBYTE_CFE
96*38b18f72SRalf Baechle	bool "Booting from CFE"
97*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
98*38b18f72SRalf Baechle	help
99*38b18f72SRalf Baechle	  Make use of the CFE API for enumerating available memory,
100*38b18f72SRalf Baechle	  controlling secondary CPUs, and possibly console output.
101*38b18f72SRalf Baechle
102*38b18f72SRalf Baechleconfig SIBYTE_CFE_CONSOLE
103*38b18f72SRalf Baechle	bool "Use firmware console"
104*38b18f72SRalf Baechle	depends on SIBYTE_CFE
105*38b18f72SRalf Baechle	help
106*38b18f72SRalf Baechle	  Use the CFE API's console write routines during boot.  Other console
107*38b18f72SRalf Baechle	  options (VT console, sb1250 duart console, etc.) should not be
108*38b18f72SRalf Baechle	  configured.
109*38b18f72SRalf Baechle
110*38b18f72SRalf Baechleconfig SIBYTE_STANDALONE
111*38b18f72SRalf Baechle	bool
112*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
113*38b18f72SRalf Baechle	default y
114*38b18f72SRalf Baechle
115*38b18f72SRalf Baechleconfig SIBYTE_STANDALONE_RAM_SIZE
116*38b18f72SRalf Baechle	int "Memory size (in megabytes)"
117*38b18f72SRalf Baechle	depends on SIBYTE_STANDALONE
118*38b18f72SRalf Baechle	default "32"
119*38b18f72SRalf Baechle
120*38b18f72SRalf Baechleconfig SIBYTE_BUS_WATCHER
121*38b18f72SRalf Baechle	bool "Support for Bus Watcher statistics"
122*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
123*38b18f72SRalf Baechle	help
124*38b18f72SRalf Baechle	  Handle and keep statistics on the bus error interrupts (COR_ECC,
125*38b18f72SRalf Baechle	  BAD_ECC, IO_BUS).
126*38b18f72SRalf Baechle
127*38b18f72SRalf Baechleconfig SIBYTE_BW_TRACE
128*38b18f72SRalf Baechle	bool "Capture bus trace before bus error"
129*38b18f72SRalf Baechle	depends on SIBYTE_BUS_WATCHER
130*38b18f72SRalf Baechle	help
131*38b18f72SRalf Baechle	  Run a continuous bus trace, dumping the raw data as soon as
132*38b18f72SRalf Baechle	  a ZBbus error is detected.  Cannot work if ZBbus profiling
133*38b18f72SRalf Baechle	  is turned on, and also will interfere with JTAG-based trace
134*38b18f72SRalf Baechle	  buffer activity.  Raw buffer data is dumped to console, and
135*38b18f72SRalf Baechle	  must be processed off-line.
136*38b18f72SRalf Baechle
137*38b18f72SRalf Baechleconfig SIBYTE_SB1250_PROF
138*38b18f72SRalf Baechle	bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
139*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
140*38b18f72SRalf Baechle
141*38b18f72SRalf Baechleconfig SIBYTE_TBPROF
142*38b18f72SRalf Baechle	bool "Support for ZBbus profiling"
143*38b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
144