138b18f72SRalf Baechleconfig SIBYTE_SB1250 238b18f72SRalf Baechle bool 338b18f72SRalf Baechle select HW_HAS_PCI 438b18f72SRalf Baechle select SIBYTE_HAS_LDT 538b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 6e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 738b18f72SRalf Baechle 838b18f72SRalf Baechleconfig SIBYTE_BCM1120 938b18f72SRalf Baechle bool 1038b18f72SRalf Baechle select SIBYTE_BCM112X 1138b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 1238b18f72SRalf Baechle 1338b18f72SRalf Baechleconfig SIBYTE_BCM1125 1438b18f72SRalf Baechle bool 1538b18f72SRalf Baechle select HW_HAS_PCI 1638b18f72SRalf Baechle select SIBYTE_BCM112X 1738b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 1838b18f72SRalf Baechle 1938b18f72SRalf Baechleconfig SIBYTE_BCM1125H 2038b18f72SRalf Baechle bool 2138b18f72SRalf Baechle select HW_HAS_PCI 2238b18f72SRalf Baechle select SIBYTE_BCM112X 2338b18f72SRalf Baechle select SIBYTE_HAS_LDT 2438b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2538b18f72SRalf Baechle 2638b18f72SRalf Baechleconfig SIBYTE_BCM112X 2738b18f72SRalf Baechle bool 2838b18f72SRalf Baechle select SIBYTE_SB1xxx_SOC 2938b18f72SRalf Baechle 30f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x80 31f137e463SAndrew Isaacson bool 32f137e463SAndrew Isaacson select HW_HAS_PCI 33f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 34e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 35f137e463SAndrew Isaacson 36f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x55 37f137e463SAndrew Isaacson bool 38f137e463SAndrew Isaacson select HW_HAS_PCI 39f137e463SAndrew Isaacson select SIBYTE_SB1xxx_SOC 40e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 41f137e463SAndrew Isaacson 4238b18f72SRalf Baechleconfig SIBYTE_SB1xxx_SOC 4338b18f72SRalf Baechle bool 4438b18f72SRalf Baechle depends on EXPERIMENTAL 4538b18f72SRalf Baechle select DMA_COHERENT 4638b18f72SRalf Baechle select SIBYTE_CFE 4738b18f72SRalf Baechle select SWAP_IO_SPACE 4838b18f72SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 4938b18f72SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 5038b18f72SRalf Baechle 5138b18f72SRalf Baechlechoice 5238b18f72SRalf Baechle prompt "SiByte SOC Stepping" 5338b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 5438b18f72SRalf Baechle 5538b18f72SRalf Baechleconfig CPU_SB1_PASS_1 5638b18f72SRalf Baechle bool "1250 Pass1" 5738b18f72SRalf Baechle depends on SIBYTE_SB1250 5838b18f72SRalf Baechle select CPU_HAS_PREFETCH 5938b18f72SRalf Baechle 6038b18f72SRalf Baechleconfig CPU_SB1_PASS_2_1250 6138b18f72SRalf Baechle bool "1250 An" 6238b18f72SRalf Baechle depends on SIBYTE_SB1250 6338b18f72SRalf Baechle select CPU_SB1_PASS_2 6438b18f72SRalf Baechle help 6538b18f72SRalf Baechle Also called BCM1250 Pass 2 6638b18f72SRalf Baechle 6738b18f72SRalf Baechleconfig CPU_SB1_PASS_2_2 6838b18f72SRalf Baechle bool "1250 Bn" 6938b18f72SRalf Baechle depends on SIBYTE_SB1250 7038b18f72SRalf Baechle select CPU_HAS_PREFETCH 7138b18f72SRalf Baechle help 7238b18f72SRalf Baechle Also called BCM1250 Pass 2.2 7338b18f72SRalf Baechle 7438b18f72SRalf Baechleconfig CPU_SB1_PASS_4 7538b18f72SRalf Baechle bool "1250 Cn" 7638b18f72SRalf Baechle depends on SIBYTE_SB1250 7738b18f72SRalf Baechle select CPU_HAS_PREFETCH 7838b18f72SRalf Baechle help 7938b18f72SRalf Baechle Also called BCM1250 Pass 3 8038b18f72SRalf Baechle 8138b18f72SRalf Baechleconfig CPU_SB1_PASS_2_112x 8238b18f72SRalf Baechle bool "112x Hybrid" 8338b18f72SRalf Baechle depends on SIBYTE_BCM112X 8438b18f72SRalf Baechle select CPU_SB1_PASS_2 8538b18f72SRalf Baechle 8638b18f72SRalf Baechleconfig CPU_SB1_PASS_3 8738b18f72SRalf Baechle bool "112x An" 8838b18f72SRalf Baechle depends on SIBYTE_BCM112X 8938b18f72SRalf Baechle select CPU_HAS_PREFETCH 9038b18f72SRalf Baechle 9138b18f72SRalf Baechleendchoice 9238b18f72SRalf Baechle 9338b18f72SRalf Baechleconfig CPU_SB1_PASS_2 9438b18f72SRalf Baechle bool 9538b18f72SRalf Baechle 9638b18f72SRalf Baechleconfig SIBYTE_HAS_LDT 9738b18f72SRalf Baechle bool 9838b18f72SRalf Baechle depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H) 9938b18f72SRalf Baechle default y 10038b18f72SRalf Baechle 10138b18f72SRalf Baechleconfig SIMULATION 10238b18f72SRalf Baechle bool "Running under simulation" 10338b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 10438b18f72SRalf Baechle help 10538b18f72SRalf Baechle Build a kernel suitable for running under the GDB simulator. 10638b18f72SRalf Baechle Primarily adjusts the kernel's notion of time. 10738b18f72SRalf Baechle 10877607635SRalf Baechleconfig SB1_CEX_ALWAYS_FATAL 109a4b5bd9aSAndrew Isaacson bool "All cache exceptions considered fatal (no recovery attempted)" 110a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 111a4b5bd9aSAndrew Isaacson 11277607635SRalf Baechleconfig SB1_CERR_STALL 113a4b5bd9aSAndrew Isaacson bool "Stall (rather than panic) on fatal cache error" 114a4b5bd9aSAndrew Isaacson depends on SIBYTE_SB1xxx_SOC 115a4b5bd9aSAndrew Isaacson 11638b18f72SRalf Baechleconfig SIBYTE_CFE 11738b18f72SRalf Baechle bool "Booting from CFE" 11838b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 119*36a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 12038b18f72SRalf Baechle help 12138b18f72SRalf Baechle Make use of the CFE API for enumerating available memory, 12238b18f72SRalf Baechle controlling secondary CPUs, and possibly console output. 12338b18f72SRalf Baechle 12438b18f72SRalf Baechleconfig SIBYTE_CFE_CONSOLE 12538b18f72SRalf Baechle bool "Use firmware console" 12638b18f72SRalf Baechle depends on SIBYTE_CFE 12738b18f72SRalf Baechle help 12838b18f72SRalf Baechle Use the CFE API's console write routines during boot. Other console 12938b18f72SRalf Baechle options (VT console, sb1250 duart console, etc.) should not be 13038b18f72SRalf Baechle configured. 13138b18f72SRalf Baechle 13238b18f72SRalf Baechleconfig SIBYTE_STANDALONE 13338b18f72SRalf Baechle bool 13438b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE 135*36a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 13638b18f72SRalf Baechle default y 13738b18f72SRalf Baechle 13838b18f72SRalf Baechleconfig SIBYTE_STANDALONE_RAM_SIZE 13938b18f72SRalf Baechle int "Memory size (in megabytes)" 14038b18f72SRalf Baechle depends on SIBYTE_STANDALONE 14138b18f72SRalf Baechle default "32" 14238b18f72SRalf Baechle 14338b18f72SRalf Baechleconfig SIBYTE_BUS_WATCHER 14438b18f72SRalf Baechle bool "Support for Bus Watcher statistics" 14538b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 14638b18f72SRalf Baechle help 14738b18f72SRalf Baechle Handle and keep statistics on the bus error interrupts (COR_ECC, 14838b18f72SRalf Baechle BAD_ECC, IO_BUS). 14938b18f72SRalf Baechle 15038b18f72SRalf Baechleconfig SIBYTE_BW_TRACE 15138b18f72SRalf Baechle bool "Capture bus trace before bus error" 15238b18f72SRalf Baechle depends on SIBYTE_BUS_WATCHER 15338b18f72SRalf Baechle help 15438b18f72SRalf Baechle Run a continuous bus trace, dumping the raw data as soon as 15538b18f72SRalf Baechle a ZBbus error is detected. Cannot work if ZBbus profiling 15638b18f72SRalf Baechle is turned on, and also will interfere with JTAG-based trace 15738b18f72SRalf Baechle buffer activity. Raw buffer data is dumped to console, and 15838b18f72SRalf Baechle must be processed off-line. 15938b18f72SRalf Baechle 16038b18f72SRalf Baechleconfig SIBYTE_SB1250_PROF 16138b18f72SRalf Baechle bool "Support for SB1/SOC profiling - SB1/SCD perf counters" 16238b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 16338b18f72SRalf Baechle 16438b18f72SRalf Baechleconfig SIBYTE_TBPROF 16538b18f72SRalf Baechle bool "Support for ZBbus profiling" 16638b18f72SRalf Baechle depends on SIBYTE_SB1xxx_SOC 167