xref: /linux/arch/mips/sibyte/Kconfig (revision 217dd11e9d0442767fa13c9c188be0b92dc93d7e)
138b18f72SRalf Baechleconfig SIBYTE_SB1250
238b18f72SRalf Baechle	bool
3*217dd11eSRalf Baechle	select CEVT_SB1250
4*217dd11eSRalf Baechle	select CSRC_SB1250
538b18f72SRalf Baechle	select HW_HAS_PCI
67bcf7717SRalf Baechle	select IRQ_CPU
7ca6f5494SRalf Baechle	select SIBYTE_ENABLE_LDT_IF_PCI
8d619f38fSMark Mason	select SIBYTE_HAS_ZBUS_PROFILING
938b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
10e73ea273SRalf Baechle	select SYS_SUPPORTS_SMP
1138b18f72SRalf Baechle
1238b18f72SRalf Baechleconfig SIBYTE_BCM1120
1338b18f72SRalf Baechle	bool
14*217dd11eSRalf Baechle	select CEVT_SB1250
15*217dd11eSRalf Baechle	select CSRC_SB1250
167bcf7717SRalf Baechle	select IRQ_CPU
1738b18f72SRalf Baechle	select SIBYTE_BCM112X
18bb9b813bSRalf Baechle	select SIBYTE_HAS_ZBUS_PROFILING
1938b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
2038b18f72SRalf Baechle
2138b18f72SRalf Baechleconfig SIBYTE_BCM1125
2238b18f72SRalf Baechle	bool
23*217dd11eSRalf Baechle	select CEVT_SB1250
24*217dd11eSRalf Baechle	select CSRC_SB1250
2538b18f72SRalf Baechle	select HW_HAS_PCI
267bcf7717SRalf Baechle	select IRQ_CPU
2738b18f72SRalf Baechle	select SIBYTE_BCM112X
28bb9b813bSRalf Baechle	select SIBYTE_HAS_ZBUS_PROFILING
2938b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
3038b18f72SRalf Baechle
3138b18f72SRalf Baechleconfig SIBYTE_BCM1125H
3238b18f72SRalf Baechle	bool
33*217dd11eSRalf Baechle	select CEVT_SB1250
34*217dd11eSRalf Baechle	select CSRC_SB1250
3538b18f72SRalf Baechle	select HW_HAS_PCI
367bcf7717SRalf Baechle	select IRQ_CPU
3738b18f72SRalf Baechle	select SIBYTE_BCM112X
38ca6f5494SRalf Baechle	select SIBYTE_ENABLE_LDT_IF_PCI
39bb9b813bSRalf Baechle	select SIBYTE_HAS_ZBUS_PROFILING
4038b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
4138b18f72SRalf Baechle
4238b18f72SRalf Baechleconfig SIBYTE_BCM112X
4338b18f72SRalf Baechle	bool
44*217dd11eSRalf Baechle	select CEVT_SB1250
45*217dd11eSRalf Baechle	select CSRC_SB1250
467bcf7717SRalf Baechle	select IRQ_CPU
4738b18f72SRalf Baechle	select SIBYTE_SB1xxx_SOC
48bb9b813bSRalf Baechle	select SIBYTE_HAS_ZBUS_PROFILING
4938b18f72SRalf Baechle
50f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x80
51f137e463SAndrew Isaacson	bool
52*217dd11eSRalf Baechle	select CEVT_BCM1480
53*217dd11eSRalf Baechle	select CSRC_BCM1480
54f137e463SAndrew Isaacson	select HW_HAS_PCI
557bcf7717SRalf Baechle	select IRQ_CPU
56d619f38fSMark Mason	select SIBYTE_HAS_ZBUS_PROFILING
57f137e463SAndrew Isaacson	select SIBYTE_SB1xxx_SOC
58e73ea273SRalf Baechle	select SYS_SUPPORTS_SMP
59f137e463SAndrew Isaacson
60f137e463SAndrew Isaacsonconfig SIBYTE_BCM1x55
61f137e463SAndrew Isaacson	bool
62*217dd11eSRalf Baechle	select CEVT_BCM1480
63*217dd11eSRalf Baechle	select CSRC_BCM1480
64f137e463SAndrew Isaacson	select HW_HAS_PCI
657bcf7717SRalf Baechle	select IRQ_CPU
66f137e463SAndrew Isaacson	select SIBYTE_SB1xxx_SOC
67bb9b813bSRalf Baechle	select SIBYTE_HAS_ZBUS_PROFILING
68e73ea273SRalf Baechle	select SYS_SUPPORTS_SMP
69f137e463SAndrew Isaacson
7038b18f72SRalf Baechleconfig SIBYTE_SB1xxx_SOC
7138b18f72SRalf Baechle	bool
7238b18f72SRalf Baechle	select DMA_COHERENT
737bcf7717SRalf Baechle	select IRQ_CPU
7438b18f72SRalf Baechle	select SIBYTE_CFE
7538b18f72SRalf Baechle	select SWAP_IO_SPACE
7638b18f72SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
7738b18f72SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
7838b18f72SRalf Baechle
7938b18f72SRalf Baechlechoice
8038b18f72SRalf Baechle	prompt "SiByte SOC Stepping"
8138b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
8238b18f72SRalf Baechle
8338b18f72SRalf Baechleconfig CPU_SB1_PASS_1
8438b18f72SRalf Baechle	bool "1250 Pass1"
8538b18f72SRalf Baechle	depends on SIBYTE_SB1250
8638b18f72SRalf Baechle	select CPU_HAS_PREFETCH
8738b18f72SRalf Baechle
8838b18f72SRalf Baechleconfig CPU_SB1_PASS_2_1250
8938b18f72SRalf Baechle	bool "1250 An"
9038b18f72SRalf Baechle	depends on SIBYTE_SB1250
9138b18f72SRalf Baechle	select CPU_SB1_PASS_2
9238b18f72SRalf Baechle	help
9338b18f72SRalf Baechle	  Also called BCM1250 Pass 2
9438b18f72SRalf Baechle
9538b18f72SRalf Baechleconfig CPU_SB1_PASS_2_2
9638b18f72SRalf Baechle	bool "1250 Bn"
9738b18f72SRalf Baechle	depends on SIBYTE_SB1250
9838b18f72SRalf Baechle	select CPU_HAS_PREFETCH
9938b18f72SRalf Baechle	help
10038b18f72SRalf Baechle	  Also called BCM1250 Pass 2.2
10138b18f72SRalf Baechle
10238b18f72SRalf Baechleconfig CPU_SB1_PASS_4
10338b18f72SRalf Baechle	bool "1250 Cn"
10438b18f72SRalf Baechle	depends on SIBYTE_SB1250
10538b18f72SRalf Baechle	select CPU_HAS_PREFETCH
10638b18f72SRalf Baechle	help
10738b18f72SRalf Baechle	  Also called BCM1250 Pass 3
10838b18f72SRalf Baechle
10938b18f72SRalf Baechleconfig CPU_SB1_PASS_2_112x
11038b18f72SRalf Baechle	bool "112x Hybrid"
11138b18f72SRalf Baechle	depends on SIBYTE_BCM112X
11238b18f72SRalf Baechle	select CPU_SB1_PASS_2
11338b18f72SRalf Baechle
11438b18f72SRalf Baechleconfig CPU_SB1_PASS_3
11538b18f72SRalf Baechle	bool "112x An"
11638b18f72SRalf Baechle	depends on SIBYTE_BCM112X
11738b18f72SRalf Baechle	select CPU_HAS_PREFETCH
11838b18f72SRalf Baechle
11938b18f72SRalf Baechleendchoice
12038b18f72SRalf Baechle
12138b18f72SRalf Baechleconfig CPU_SB1_PASS_2
12238b18f72SRalf Baechle	bool
12338b18f72SRalf Baechle
12438b18f72SRalf Baechleconfig SIBYTE_HAS_LDT
12538b18f72SRalf Baechle	bool
126ca6f5494SRalf Baechle
127ca6f5494SRalf Baechleconfig SIBYTE_ENABLE_LDT_IF_PCI
128ca6f5494SRalf Baechle	bool
129ca6f5494SRalf Baechle	select SIBYTE_HAS_LDT if PCI
13038b18f72SRalf Baechle
13138b18f72SRalf Baechleconfig SIMULATION
13238b18f72SRalf Baechle	bool "Running under simulation"
13338b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
13438b18f72SRalf Baechle	help
13538b18f72SRalf Baechle	  Build a kernel suitable for running under the GDB simulator.
13638b18f72SRalf Baechle	  Primarily adjusts the kernel's notion of time.
13738b18f72SRalf Baechle
13877607635SRalf Baechleconfig SB1_CEX_ALWAYS_FATAL
139a4b5bd9aSAndrew Isaacson	bool "All cache exceptions considered fatal (no recovery attempted)"
140a4b5bd9aSAndrew Isaacson	depends on SIBYTE_SB1xxx_SOC
141a4b5bd9aSAndrew Isaacson
14277607635SRalf Baechleconfig SB1_CERR_STALL
143a4b5bd9aSAndrew Isaacson	bool "Stall (rather than panic) on fatal cache error"
144a4b5bd9aSAndrew Isaacson	depends on SIBYTE_SB1xxx_SOC
145a4b5bd9aSAndrew Isaacson
14638b18f72SRalf Baechleconfig SIBYTE_CFE
14738b18f72SRalf Baechle	bool "Booting from CFE"
14838b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
149df78b5c8SAurelien Jarno	select CFE
15036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
15138b18f72SRalf Baechle	help
15238b18f72SRalf Baechle	  Make use of the CFE API for enumerating available memory,
15338b18f72SRalf Baechle	  controlling secondary CPUs, and possibly console output.
15438b18f72SRalf Baechle
15538b18f72SRalf Baechleconfig SIBYTE_CFE_CONSOLE
15638b18f72SRalf Baechle	bool "Use firmware console"
15738b18f72SRalf Baechle	depends on SIBYTE_CFE
15838b18f72SRalf Baechle	help
15938b18f72SRalf Baechle	  Use the CFE API's console write routines during boot.  Other console
16038b18f72SRalf Baechle	  options (VT console, sb1250 duart console, etc.) should not be
16138b18f72SRalf Baechle	  configured.
16238b18f72SRalf Baechle
16338b18f72SRalf Baechleconfig SIBYTE_STANDALONE
16438b18f72SRalf Baechle	bool
16538b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
16636a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
16738b18f72SRalf Baechle	default y
16838b18f72SRalf Baechle
16938b18f72SRalf Baechleconfig SIBYTE_STANDALONE_RAM_SIZE
17038b18f72SRalf Baechle	int "Memory size (in megabytes)"
17138b18f72SRalf Baechle	depends on SIBYTE_STANDALONE
17238b18f72SRalf Baechle	default "32"
17338b18f72SRalf Baechle
17438b18f72SRalf Baechleconfig SIBYTE_BUS_WATCHER
17538b18f72SRalf Baechle	bool "Support for Bus Watcher statistics"
17638b18f72SRalf Baechle	depends on SIBYTE_SB1xxx_SOC
17738b18f72SRalf Baechle	help
17838b18f72SRalf Baechle	  Handle and keep statistics on the bus error interrupts (COR_ECC,
17938b18f72SRalf Baechle	  BAD_ECC, IO_BUS).
18038b18f72SRalf Baechle
18138b18f72SRalf Baechleconfig SIBYTE_BW_TRACE
18238b18f72SRalf Baechle	bool "Capture bus trace before bus error"
18338b18f72SRalf Baechle	depends on SIBYTE_BUS_WATCHER
18438b18f72SRalf Baechle	help
18538b18f72SRalf Baechle	  Run a continuous bus trace, dumping the raw data as soon as
18638b18f72SRalf Baechle	  a ZBbus error is detected.  Cannot work if ZBbus profiling
18738b18f72SRalf Baechle	  is turned on, and also will interfere with JTAG-based trace
18838b18f72SRalf Baechle	  buffer activity.  Raw buffer data is dumped to console, and
18938b18f72SRalf Baechle	  must be processed off-line.
19038b18f72SRalf Baechle
19138b18f72SRalf Baechleconfig SIBYTE_TBPROF
192bb9b813bSRalf Baechle	tristate "Support for ZBbus profiling"
193bb9b813bSRalf Baechle	depends on SIBYTE_HAS_ZBUS_PROFILING
194bb9b813bSRalf Baechle
195bb9b813bSRalf Baechleconfig SIBYTE_HAS_ZBUS_PROFILING
196bb9b813bSRalf Baechle	bool
197