xref: /linux/arch/mips/sgi-ip32/crime.c (revision 4b660dbd9ee2059850fd30e0df420ca7a38a1856)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2001, 2003 Keith M Wesolowski
7  * Copyright (C) 2005 Ilya A. Volynets <ilya@total-knowledge.com>
8  */
9 #include <linux/types.h>
10 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/interrupt.h>
13 #include <linux/export.h>
14 #include <asm/bootinfo.h>
15 #include <asm/io.h>
16 #include <asm/mipsregs.h>
17 #include <asm/page.h>
18 #include <asm/ip32/crime.h>
19 #include <asm/ip32/mace.h>
20 
21 #include "ip32-common.h"
22 
23 struct sgi_crime __iomem *crime;
24 struct sgi_mace __iomem *mace;
25 
26 EXPORT_SYMBOL_GPL(mace);
27 
28 void __init crime_init(void)
29 {
30 	unsigned int id, rev;
31 	const int field = 2 * sizeof(unsigned long);
32 
33 	set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
34 	crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
35 	mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
36 
37 	id = crime->id;
38 	rev = id & CRIME_ID_REV;
39 	id = (id & CRIME_ID_IDBITS) >> 4;
40 	printk(KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
41 	       id, rev, field, (unsigned long) CRIME_BASE);
42 }
43 
44 irqreturn_t crime_memerr_intr(int irq, void *dev_id)
45 {
46 	unsigned long stat, addr;
47 	int fatal = 0;
48 
49 	stat = crime->mem_error_stat & CRIME_MEM_ERROR_STAT_MASK;
50 	addr = crime->mem_error_addr & CRIME_MEM_ERROR_ADDR_MASK;
51 
52 	printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, stat);
53 
54 	if (stat & CRIME_MEM_ERROR_INV)
55 		printk("INV,");
56 	if (stat & CRIME_MEM_ERROR_ECC) {
57 		unsigned long ecc_syn =
58 			crime->mem_ecc_syn & CRIME_MEM_ERROR_ECC_SYN_MASK;
59 		unsigned long ecc_gen =
60 			crime->mem_ecc_chk & CRIME_MEM_ERROR_ECC_CHK_MASK;
61 		printk("ECC,SYN=0x%08lx,GEN=0x%08lx,", ecc_syn, ecc_gen);
62 	}
63 	if (stat & CRIME_MEM_ERROR_MULTIPLE) {
64 		fatal = 1;
65 		printk("MULTIPLE,");
66 	}
67 	if (stat & CRIME_MEM_ERROR_HARD_ERR) {
68 		fatal = 1;
69 		printk("HARD,");
70 	}
71 	if (stat & CRIME_MEM_ERROR_SOFT_ERR)
72 		printk("SOFT,");
73 	if (stat & CRIME_MEM_ERROR_CPU_ACCESS)
74 		printk("CPU,");
75 	if (stat & CRIME_MEM_ERROR_VICE_ACCESS)
76 		printk("VICE,");
77 	if (stat & CRIME_MEM_ERROR_GBE_ACCESS)
78 		printk("GBE,");
79 	if (stat & CRIME_MEM_ERROR_RE_ACCESS)
80 		printk("RE,REID=0x%02lx,", (stat & CRIME_MEM_ERROR_RE_ID)>>8);
81 	if (stat & CRIME_MEM_ERROR_MACE_ACCESS)
82 		printk("MACE,MACEID=0x%02lx,", stat & CRIME_MEM_ERROR_MACE_ID);
83 
84 	crime->mem_error_stat = 0;
85 
86 	if (fatal) {
87 		printk("FATAL>\n");
88 		panic("Fatal memory error.");
89 	} else
90 		printk("NONFATAL>\n");
91 
92 	return IRQ_HANDLED;
93 }
94 
95 irqreturn_t crime_cpuerr_intr(int irq, void *dev_id)
96 {
97 	unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
98 	unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
99 
100 	addr <<= 2;
101 	printk("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
102 	crime->cpu_error_stat = 0;
103 
104 	return IRQ_HANDLED;
105 }
106