xref: /linux/arch/mips/sgi-ip22/ip22-platform.c (revision af7b83f9324a77ef9a9080044bf0461f444ca651)
1 #include <linux/init.h>
2 #include <linux/if_ether.h>
3 #include <linux/kernel.h>
4 #include <linux/platform_device.h>
5 
6 #include <asm/paccess.h>
7 #include <asm/sgi/ip22.h>
8 #include <asm/sgi/hpc3.h>
9 #include <asm/sgi/mc.h>
10 #include <asm/sgi/seeq.h>
11 #include <asm/sgi/wd.h>
12 
13 static struct resource sgiwd93_0_resources[] = {
14 	{
15 		.name	= "eth0 irq",
16 		.start	= SGI_WD93_0_IRQ,
17 		.end	= SGI_WD93_0_IRQ,
18 		.flags	= IORESOURCE_IRQ
19 	}
20 };
21 
22 static struct sgiwd93_platform_data sgiwd93_0_pd = {
23 	.unit	= 0,
24 	.irq	= SGI_WD93_0_IRQ,
25 };
26 
27 static struct platform_device sgiwd93_0_device = {
28 	.name		= "sgiwd93",
29 	.id		= 0,
30 	.num_resources	= ARRAY_SIZE(sgiwd93_0_resources),
31 	.resource	= sgiwd93_0_resources,
32 	.dev = {
33 		.platform_data = &sgiwd93_0_pd,
34 	},
35 };
36 
37 static struct resource sgiwd93_1_resources[] = {
38 	{
39 		.name	= "eth0 irq",
40 		.start	= SGI_WD93_1_IRQ,
41 		.end	= SGI_WD93_1_IRQ,
42 		.flags	= IORESOURCE_IRQ
43 	}
44 };
45 
46 static struct sgiwd93_platform_data sgiwd93_1_pd = {
47 	.unit	= 1,
48 	.irq	= SGI_WD93_1_IRQ,
49 };
50 
51 static struct platform_device sgiwd93_1_device = {
52 	.name		= "sgiwd93",
53 	.id		= 1,
54 	.num_resources	= ARRAY_SIZE(sgiwd93_1_resources),
55 	.resource	= sgiwd93_1_resources,
56 	.dev = {
57 		.platform_data = &sgiwd93_1_pd,
58 	},
59 };
60 
61 /*
62  * Create a platform device for the GPI port that receives the
63  * image data from the embedded camera.
64  */
65 static int __init sgiwd93_devinit(void)
66 {
67 	int res;
68 
69 	sgiwd93_0_pd.hregs	= &hpc3c0->scsi_chan0;
70 	sgiwd93_0_pd.wdregs	= (unsigned char *) hpc3c0->scsi0_ext;
71 
72 	res = platform_device_register(&sgiwd93_0_device);
73 	if (res)
74 		return res;
75 
76 	if (!ip22_is_fullhouse())
77 		return 0;
78 
79 	sgiwd93_1_pd.hregs	= &hpc3c0->scsi_chan1;
80 	sgiwd93_1_pd.wdregs	= (unsigned char *) hpc3c0->scsi1_ext;
81 
82 	return platform_device_register(&sgiwd93_1_device);
83 }
84 
85 device_initcall(sgiwd93_devinit);
86 
87 static struct resource sgiseeq_0_resources[] = {
88 	{
89 		.name	= "eth0 irq",
90 		.start	= SGI_ENET_IRQ,
91 		.end	= SGI_ENET_IRQ,
92 		.flags	= IORESOURCE_IRQ
93 	}
94 };
95 
96 static struct sgiseeq_platform_data eth0_pd;
97 
98 static struct platform_device eth0_device = {
99 	.name		= "sgiseeq",
100 	.id		= 0,
101 	.num_resources	= ARRAY_SIZE(sgiseeq_0_resources),
102 	.resource	= sgiseeq_0_resources,
103 	.dev = {
104 		.platform_data = &eth0_pd,
105 	},
106 };
107 
108 static struct resource sgiseeq_1_resources[] = {
109 	{
110 		.name	= "eth1 irq",
111 		.start	= SGI_GIO_0_IRQ,
112 		.end	= SGI_GIO_0_IRQ,
113 		.flags	= IORESOURCE_IRQ
114 	}
115 };
116 
117 static struct sgiseeq_platform_data eth1_pd;
118 
119 static struct platform_device eth1_device = {
120 	.name		= "sgiseeq",
121 	.id		= 1,
122 	.num_resources	= ARRAY_SIZE(sgiseeq_1_resources),
123 	.resource	= sgiseeq_1_resources,
124 	.dev = {
125 		.platform_data = &eth1_pd,
126 	},
127 };
128 
129 /*
130  * Create a platform device for the GPI port that receives the
131  * image data from the embedded camera.
132  */
133 static int __init sgiseeq_devinit(void)
134 {
135 	unsigned int tmp;
136 	int res, i;
137 
138 	eth0_pd.hpc = hpc3c0;
139 	eth0_pd.irq = SGI_ENET_IRQ;
140 #define EADDR_NVOFS     250
141 	for (i = 0; i < 3; i++) {
142 		unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
143 
144 		eth0_pd.mac[2 * i]     = tmp >> 8;
145 		eth0_pd.mac[2 * i + 1] = tmp & 0xff;
146 	}
147 
148 	res = platform_device_register(&eth0_device);
149 	if (res)
150 		return res;
151 
152 	/* Second HPC is missing? */
153 	if (!ip22_is_fullhouse() ||
154 	    get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]))
155 		return 0;
156 
157 	sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 |
158 	                 SGIMC_GIOPAR_HPC264;
159 	hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
160 	/* interrupt/config register on Challenge S Mezz board */
161 	hpc3c1->pbus_extregs[0][0] = 0x30;
162 
163 	eth1_pd.hpc = hpc3c1;
164 	eth1_pd.irq = SGI_GIO_0_IRQ;
165 #define EADDR_NVOFS     250
166 	for (i = 0; i < 3; i++) {
167 		unsigned short tmp = ip22_eeprom_read(&hpc3c1->eeprom,
168 		                                      EADDR_NVOFS / 2 + i);
169 
170 		eth1_pd.mac[2 * i]     = tmp >> 8;
171 		eth1_pd.mac[2 * i + 1] = tmp & 0xff;
172 	}
173 
174 	return platform_device_register(&eth1_device);
175 }
176 
177 device_initcall(sgiseeq_devinit);
178