1 /* 2 * Miscellaneous functions for IDT EB434 board 3 * 4 * Copyright 2004 IDT Inc. (rischelp@idt.com) 5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org> 6 * Copyright 2007 Florian Fainelli <florian@openwrt.org> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28 29 #include <linux/kernel.h> 30 #include <linux/init.h> 31 #include <linux/types.h> 32 #include <linux/export.h> 33 #include <linux/spinlock.h> 34 #include <linux/platform_device.h> 35 #include <linux/gpio/driver.h> 36 37 #include <asm/mach-rc32434/rb.h> 38 #include <asm/mach-rc32434/gpio.h> 39 40 /* Offsets relative to GPIOBASE */ 41 #define GPIOFUNC 0x00 42 #define GPIOCFG 0x04 43 #define GPIOD 0x08 44 #define GPIOILEVEL 0x0C 45 #define GPIOISTAT 0x10 46 #define GPIONMIEN 0x14 47 #define IMASK6 0x38 48 49 struct rb532_gpio_chip { 50 struct gpio_chip chip; 51 void __iomem *regbase; 52 }; 53 54 /* rb532_set_bit - sanely set a bit 55 * 56 * bitval: new value for the bit 57 * offset: bit index in the 4 byte address range 58 * ioaddr: 4 byte aligned address being altered 59 */ 60 static inline void rb532_set_bit(unsigned bitval, 61 unsigned offset, void __iomem *ioaddr) 62 { 63 unsigned long flags; 64 u32 val; 65 66 local_irq_save(flags); 67 68 val = readl(ioaddr); 69 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */ 70 val |= (!!bitval << offset); /* set bit if bitval == 1 */ 71 writel(val, ioaddr); 72 73 local_irq_restore(flags); 74 } 75 76 /* rb532_get_bit - read a bit 77 * 78 * returns the boolean state of the bit, which may be > 1 79 */ 80 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr) 81 { 82 return readl(ioaddr) & (1 << offset); 83 } 84 85 /* 86 * Return GPIO level */ 87 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) 88 { 89 struct rb532_gpio_chip *gpch; 90 91 gpch = gpiochip_get_data(chip); 92 return !!rb532_get_bit(offset, gpch->regbase + GPIOD); 93 } 94 95 /* 96 * Set output GPIO level 97 */ 98 static int rb532_gpio_set(struct gpio_chip *chip, unsigned int offset, 99 int value) 100 { 101 struct rb532_gpio_chip *gpch; 102 103 gpch = gpiochip_get_data(chip); 104 rb532_set_bit(value, offset, gpch->regbase + GPIOD); 105 106 return 0; 107 } 108 109 /* 110 * Set GPIO direction to input 111 */ 112 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 113 { 114 struct rb532_gpio_chip *gpch; 115 116 gpch = gpiochip_get_data(chip); 117 118 /* disable alternate function in case it's set */ 119 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); 120 121 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); 122 return 0; 123 } 124 125 /* 126 * Set GPIO direction to output 127 */ 128 static int rb532_gpio_direction_output(struct gpio_chip *chip, 129 unsigned offset, int value) 130 { 131 struct rb532_gpio_chip *gpch; 132 133 gpch = gpiochip_get_data(chip); 134 135 /* disable alternate function in case it's set */ 136 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); 137 138 /* set the initial output value */ 139 rb532_set_bit(value, offset, gpch->regbase + GPIOD); 140 141 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); 142 return 0; 143 } 144 145 static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) 146 { 147 return 8 + 4 * 32 + gpio; 148 } 149 150 static struct rb532_gpio_chip rb532_gpio_chip[] = { 151 [0] = { 152 .chip = { 153 .label = "gpio0", 154 .direction_input = rb532_gpio_direction_input, 155 .direction_output = rb532_gpio_direction_output, 156 .get = rb532_gpio_get, 157 .set = rb532_gpio_set, 158 .to_irq = rb532_gpio_to_irq, 159 .base = 0, 160 .ngpio = 32, 161 }, 162 }, 163 }; 164 165 /* 166 * Set GPIO interrupt level 167 */ 168 void rb532_gpio_set_ilevel(int bit, unsigned gpio) 169 { 170 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); 171 } 172 EXPORT_SYMBOL(rb532_gpio_set_ilevel); 173 174 /* 175 * Set GPIO interrupt status 176 */ 177 void rb532_gpio_set_istat(int bit, unsigned gpio) 178 { 179 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); 180 } 181 EXPORT_SYMBOL(rb532_gpio_set_istat); 182 183 /* 184 * Configure GPIO alternate function 185 */ 186 void rb532_gpio_set_func(unsigned gpio) 187 { 188 rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC); 189 } 190 EXPORT_SYMBOL(rb532_gpio_set_func); 191 192 static int rb532_gpio_probe(struct platform_device *pdev) 193 { 194 struct device *dev = &pdev->dev; 195 struct resource *res; 196 197 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 198 if (!res) 199 return -EINVAL; 200 201 rb532_gpio_chip->regbase = devm_ioremap_resource(dev, res); 202 if (IS_ERR(rb532_gpio_chip->regbase)) 203 return PTR_ERR(rb532_gpio_chip->regbase); 204 205 /* Register our GPIO chip */ 206 return devm_gpiochip_add_data(dev, &rb532_gpio_chip->chip, rb532_gpio_chip); 207 } 208 209 static struct platform_driver rb532_gpio_driver = { 210 .driver = { 211 .name = "rb532-gpio", 212 }, 213 .probe = rb532_gpio_probe, 214 }; 215 216 static int __init rb532_gpio_init(void) 217 { 218 return platform_driver_register(&rb532_gpio_driver); 219 } 220 arch_initcall(rb532_gpio_init); 221