1 /* 2 * Miscellaneous functions for IDT EB434 board 3 * 4 * Copyright 2004 IDT Inc. (rischelp@idt.com) 5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org> 6 * Copyright 2007 Florian Fainelli <florian@openwrt.org> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28 29 #include <linux/kernel.h> 30 #include <linux/init.h> 31 #include <linux/types.h> 32 #include <linux/spinlock.h> 33 #include <linux/platform_device.h> 34 #include <linux/gpio.h> 35 36 #include <asm/mach-rc32434/rb.h> 37 #include <asm/mach-rc32434/gpio.h> 38 39 struct rb532_gpio_chip { 40 struct gpio_chip chip; 41 void __iomem *regbase; 42 }; 43 44 static struct resource rb532_gpio_reg0_res[] = { 45 { 46 .name = "gpio_reg0", 47 .start = REGBASE + GPIOBASE, 48 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1, 49 .flags = IORESOURCE_MEM, 50 } 51 }; 52 53 /* rb532_set_bit - sanely set a bit 54 * 55 * bitval: new value for the bit 56 * offset: bit index in the 4 byte address range 57 * ioaddr: 4 byte aligned address being altered 58 */ 59 static inline void rb532_set_bit(unsigned bitval, 60 unsigned offset, void __iomem *ioaddr) 61 { 62 unsigned long flags; 63 u32 val; 64 65 local_irq_save(flags); 66 67 val = readl(ioaddr); 68 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */ 69 val |= (!!bitval << offset); /* set bit if bitval == 1 */ 70 writel(val, ioaddr); 71 72 local_irq_restore(flags); 73 } 74 75 /* rb532_get_bit - read a bit 76 * 77 * returns the boolean state of the bit, which may be > 1 78 */ 79 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr) 80 { 81 return (readl(ioaddr) & (1 << offset)); 82 } 83 84 /* 85 * Return GPIO level */ 86 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) 87 { 88 struct rb532_gpio_chip *gpch; 89 90 gpch = container_of(chip, struct rb532_gpio_chip, chip); 91 return rb532_get_bit(offset, gpch->regbase + GPIOD); 92 } 93 94 /* 95 * Set output GPIO level 96 */ 97 static void rb532_gpio_set(struct gpio_chip *chip, 98 unsigned offset, int value) 99 { 100 struct rb532_gpio_chip *gpch; 101 102 gpch = container_of(chip, struct rb532_gpio_chip, chip); 103 rb532_set_bit(value, offset, gpch->regbase + GPIOD); 104 } 105 106 /* 107 * Set GPIO direction to input 108 */ 109 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 110 { 111 struct rb532_gpio_chip *gpch; 112 113 gpch = container_of(chip, struct rb532_gpio_chip, chip); 114 115 /* disable alternate function in case it's set */ 116 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); 117 118 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); 119 return 0; 120 } 121 122 /* 123 * Set GPIO direction to output 124 */ 125 static int rb532_gpio_direction_output(struct gpio_chip *chip, 126 unsigned offset, int value) 127 { 128 struct rb532_gpio_chip *gpch; 129 130 gpch = container_of(chip, struct rb532_gpio_chip, chip); 131 132 /* disable alternate function in case it's set */ 133 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); 134 135 /* set the initial output value */ 136 rb532_set_bit(value, offset, gpch->regbase + GPIOD); 137 138 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); 139 return 0; 140 } 141 142 static struct rb532_gpio_chip rb532_gpio_chip[] = { 143 [0] = { 144 .chip = { 145 .label = "gpio0", 146 .direction_input = rb532_gpio_direction_input, 147 .direction_output = rb532_gpio_direction_output, 148 .get = rb532_gpio_get, 149 .set = rb532_gpio_set, 150 .base = 0, 151 .ngpio = 32, 152 }, 153 }, 154 }; 155 156 /* 157 * Set GPIO interrupt level 158 */ 159 void rb532_gpio_set_ilevel(int bit, unsigned gpio) 160 { 161 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL); 162 } 163 EXPORT_SYMBOL(rb532_gpio_set_ilevel); 164 165 /* 166 * Set GPIO interrupt status 167 */ 168 void rb532_gpio_set_istat(int bit, unsigned gpio) 169 { 170 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT); 171 } 172 EXPORT_SYMBOL(rb532_gpio_set_istat); 173 174 /* 175 * Configure GPIO alternate function 176 */ 177 void rb532_gpio_set_func(unsigned gpio) 178 { 179 rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC); 180 } 181 EXPORT_SYMBOL(rb532_gpio_set_func); 182 183 int __init rb532_gpio_init(void) 184 { 185 struct resource *r; 186 187 r = rb532_gpio_reg0_res; 188 rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start); 189 190 if (!rb532_gpio_chip->regbase) { 191 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); 192 return -ENXIO; 193 } 194 195 /* Register our GPIO chip */ 196 gpiochip_add(&rb532_gpio_chip->chip); 197 198 return 0; 199 } 200 arch_initcall(rb532_gpio_init); 201