1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * RouterBoard 500 Platform devices 4 * 5 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 6 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> 7 */ 8 #include <linux/kernel.h> 9 #include <linux/export.h> 10 #include <linux/hex.h> 11 #include <linux/init.h> 12 #include <linux/ctype.h> 13 #include <linux/string.h> 14 #include <linux/platform_device.h> 15 #include <linux/mtd/platnand.h> 16 #include <linux/mtd/mtd.h> 17 #include <linux/gpio/machine.h> 18 #include <linux/gpio/property.h> 19 #include <linux/gpio_keys.h> 20 #include <linux/input.h> 21 #include <linux/property.h> 22 #include <linux/serial_8250.h> 23 24 #include <asm/bootinfo.h> 25 26 #include <asm/mach-rc32434/rc32434.h> 27 #include <asm/mach-rc32434/dma.h> 28 #include <asm/mach-rc32434/dma_v.h> 29 #include <asm/mach-rc32434/eth.h> 30 #include <asm/mach-rc32434/rb.h> 31 #include <asm/mach-rc32434/integ.h> 32 #include <asm/mach-rc32434/gpio.h> 33 #include <asm/mach-rc32434/irq.h> 34 35 #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) 36 #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) 37 38 extern unsigned int idt_cpu_freq; 39 40 static struct mpmc_device dev3; 41 42 static const struct software_node rb532_gpio0_node = { 43 .name = "gpio0", 44 }; 45 46 void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) 47 { 48 unsigned long flags; 49 50 spin_lock_irqsave(&dev3.lock, flags); 51 52 dev3.state = (dev3.state | or_mask) & ~nand_mask; 53 writeb(dev3.state, dev3.base); 54 55 spin_unlock_irqrestore(&dev3.lock, flags); 56 } 57 EXPORT_SYMBOL(set_latch_u5); 58 59 unsigned char get_latch_u5(void) 60 { 61 return dev3.state; 62 } 63 EXPORT_SYMBOL(get_latch_u5); 64 65 static struct resource korina_dev0_res[] = { 66 { 67 .name = "emac", 68 .start = ETH0_BASE_ADDR, 69 .end = ETH0_BASE_ADDR + sizeof(struct eth_regs), 70 .flags = IORESOURCE_MEM, 71 }, { 72 .name = "rx", 73 .start = ETH0_DMA_RX_IRQ, 74 .end = ETH0_DMA_RX_IRQ, 75 .flags = IORESOURCE_IRQ 76 }, { 77 .name = "tx", 78 .start = ETH0_DMA_TX_IRQ, 79 .end = ETH0_DMA_TX_IRQ, 80 .flags = IORESOURCE_IRQ 81 }, { 82 .name = "dma_rx", 83 .start = ETH0_RX_DMA_ADDR, 84 .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1, 85 .flags = IORESOURCE_MEM, 86 }, { 87 .name = "dma_tx", 88 .start = ETH0_TX_DMA_ADDR, 89 .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1, 90 .flags = IORESOURCE_MEM, 91 } 92 }; 93 94 static struct korina_device korina_dev0_data = { 95 .name = "korina0", 96 .mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee} 97 }; 98 99 static struct platform_device korina_dev0 = { 100 .id = -1, 101 .name = "korina", 102 .resource = korina_dev0_res, 103 .num_resources = ARRAY_SIZE(korina_dev0_res), 104 .dev = { 105 .platform_data = &korina_dev0_data.mac, 106 } 107 }; 108 109 static struct resource cf_slot0_res[] = { 110 { 111 .name = "cf_membase", 112 .flags = IORESOURCE_MEM 113 }, { 114 .name = "cf_irq", 115 .start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */ 116 .end = (8 + 4 * 32 + CF_GPIO_NUM), 117 .flags = IORESOURCE_IRQ 118 } 119 }; 120 121 static struct gpiod_lookup_table cf_slot0_gpio_table = { 122 .dev_id = "pata-rb532-cf", 123 .table = { 124 GPIO_LOOKUP("gpio0", CF_GPIO_NUM, 125 NULL, GPIO_ACTIVE_HIGH), 126 { }, 127 }, 128 }; 129 130 static struct platform_device cf_slot0 = { 131 .id = -1, 132 .name = "pata-rb532-cf", 133 .resource = cf_slot0_res, 134 .num_resources = ARRAY_SIZE(cf_slot0_res), 135 }; 136 137 static void rb532_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl) 138 { 139 unsigned char orbits, nandbits; 140 141 if (ctrl & NAND_CTRL_CHANGE) { 142 orbits = (ctrl & NAND_CLE) << 1; 143 orbits |= (ctrl & NAND_ALE) >> 1; 144 145 nandbits = (~ctrl & NAND_CLE) << 1; 146 nandbits |= (~ctrl & NAND_ALE) >> 1; 147 148 set_latch_u5(orbits, nandbits); 149 } 150 if (cmd != NAND_CMD_NONE) 151 writeb(cmd, chip->legacy.IO_ADDR_W); 152 } 153 154 static struct resource nand_slot0_res[] = { 155 [0] = { 156 .name = "nand_membase", 157 .flags = IORESOURCE_MEM 158 } 159 }; 160 161 static struct platform_nand_data rb532_nand_data = { 162 .ctrl.cmd_ctrl = rb532_cmd_ctrl, 163 }; 164 165 static const struct property_entry nand0_properties[] = { 166 PROPERTY_ENTRY_GPIO("ready-gpios", &rb532_gpio0_node, 167 GPIO_RDY, GPIO_ACTIVE_HIGH), 168 { } 169 }; 170 171 static const struct platform_device_info nand0_info __initconst = { 172 .name = "gen_nand", 173 .id = PLATFORM_DEVID_NONE, 174 .res = nand_slot0_res, 175 .num_res = ARRAY_SIZE(nand_slot0_res), 176 .data = &rb532_nand_data, 177 .size_data = sizeof(struct platform_nand_data), 178 .properties = nand0_properties, 179 }; 180 181 static struct mtd_partition rb532_partition_info[] = { 182 { 183 .name = "Routerboard NAND boot", 184 .offset = 0, 185 .size = 4 * 1024 * 1024, 186 }, { 187 .name = "rootfs", 188 .offset = MTDPART_OFS_NXTBLK, 189 .size = MTDPART_SIZ_FULL, 190 } 191 }; 192 193 static struct platform_device rb532_led = { 194 .name = "rb532-led", 195 .id = -1, 196 }; 197 198 static struct resource rb532_wdt_res[] = { 199 { 200 .name = "rb532_wdt_res", 201 .start = INTEG0_BASE_ADDR, 202 .end = INTEG0_BASE_ADDR + sizeof(struct integ), 203 .flags = IORESOURCE_MEM, 204 } 205 }; 206 207 static struct platform_device rb532_wdt = { 208 .name = "rc32434_wdt", 209 .id = -1, 210 .resource = rb532_wdt_res, 211 .num_resources = ARRAY_SIZE(rb532_wdt_res), 212 }; 213 214 static struct plat_serial8250_port rb532_uart_res[] = { 215 { 216 .type = PORT_16550A, 217 .mapbase = REGBASE + UART0BASE, 218 .mapsize = 0x1000, 219 .irq = UART0_IRQ, 220 .regshift = 2, 221 .iotype = UPIO_MEM, 222 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 223 }, 224 { 225 .flags = 0, 226 } 227 }; 228 229 static struct platform_device rb532_uart = { 230 .name = "serial8250", 231 .id = PLAT8250_DEV_PLATFORM, 232 .dev.platform_data = &rb532_uart_res, 233 }; 234 235 static struct platform_device *rb532_devs[] = { 236 &korina_dev0, 237 &cf_slot0, 238 &rb532_led, 239 &rb532_uart, 240 &rb532_wdt 241 }; 242 243 static const struct property_entry rb532_button_properties[] = { 244 PROPERTY_ENTRY_GPIO("button-gpios", &rb532_gpio0_node, 245 GPIO_BTN_S1, GPIO_ACTIVE_LOW), 246 { } 247 }; 248 249 static const struct platform_device_info rb532_button_info __initconst = { 250 .name = "rb532-button", 251 .id = PLATFORM_DEVID_NONE, 252 .properties = rb532_button_properties, 253 }; 254 255 256 /* NAND definitions */ 257 #define NAND_CHIP_DELAY 25 258 259 static void __init rb532_nand_setup(void) 260 { 261 switch (mips_machtype) { 262 case MACH_MIKROTIK_RB532A: 263 set_latch_u5(LO_FOFF | LO_CEX, 264 LO_ULED | LO_ALE | LO_CLE | LO_WPX); 265 break; 266 default: 267 set_latch_u5(LO_WPX | LO_FOFF | LO_CEX, 268 LO_ULED | LO_ALE | LO_CLE); 269 break; 270 } 271 272 /* Setup NAND specific settings */ 273 rb532_nand_data.chip.nr_chips = 1; 274 rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info); 275 rb532_nand_data.chip.partitions = rb532_partition_info; 276 rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; 277 } 278 279 280 static int __init plat_setup_devices(void) 281 { 282 struct platform_device *pd; 283 int ret; 284 285 /* Look for the CF card reader */ 286 if (!readl(IDT434_REG_BASE + DEV1MASK)) 287 rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */ 288 else { 289 cf_slot0_res[0].start = 290 readl(IDT434_REG_BASE + DEV1BASE); 291 cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000; 292 } 293 294 /* Read the NAND resources from the device controller */ 295 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE); 296 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; 297 298 /* Read and map device controller 3 */ 299 dev3.base = ioremap(readl(IDT434_REG_BASE + DEV3BASE), 1); 300 301 if (!dev3.base) { 302 printk(KERN_ERR "rb532: cannot remap device controller 3\n"); 303 return -ENXIO; 304 } 305 306 /* Initialise the NAND device */ 307 rb532_nand_setup(); 308 309 /* set the uart clock to the current cpu frequency */ 310 rb532_uart_res[0].uartclk = idt_cpu_freq; 311 312 gpiod_add_lookup_table(&cf_slot0_gpio_table); 313 ret = platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); 314 if (ret) 315 return ret; 316 317 /* 318 * Stack devices using full info and properties here, after we 319 * register the node for the GPIO chip. 320 */ 321 software_node_register(&rb532_gpio0_node); 322 323 pd = platform_device_register_full(&nand0_info); 324 ret = PTR_ERR_OR_ZERO(pd); 325 if (ret) { 326 pr_err("failed to create NAND slot0 device: %d\n", ret); 327 return ret; 328 } 329 330 pd = platform_device_register_full(&rb532_button_info); 331 ret = PTR_ERR_OR_ZERO(pd); 332 if (ret) { 333 pr_err("failed to create RB532 button device: %d\n", ret); 334 return ret; 335 } 336 337 return 0; 338 } 339 340 #ifdef CONFIG_NET 341 342 static int __init setup_kmac(char *s) 343 { 344 printk(KERN_INFO "korina mac = %s\n", s); 345 if (!mac_pton(s, korina_dev0_data.mac)) 346 printk(KERN_ERR "Invalid mac\n"); 347 return 1; 348 } 349 350 __setup("kmac=", setup_kmac); 351 352 #endif /* CONFIG_NET */ 353 354 arch_initcall(plat_setup_devices); 355