xref: /linux/arch/mips/ralink/of.c (revision 17cfcb68af3bc7d5e8ae08779b1853310a2949f3)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
5  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
6  * Copyright (C) 2013 John Crispin <john@phrozen.org>
7  */
8 
9 #include <linux/io.h>
10 #include <linux/clk.h>
11 #include <linux/init.h>
12 #include <linux/sizes.h>
13 #include <linux/of_fdt.h>
14 #include <linux/kernel.h>
15 #include <linux/memblock.h>
16 #include <linux/of_platform.h>
17 #include <linux/of_address.h>
18 
19 #include <asm/reboot.h>
20 #include <asm/bootinfo.h>
21 #include <asm/addrspace.h>
22 #include <asm/prom.h>
23 
24 #include "common.h"
25 
26 __iomem void *rt_sysc_membase;
27 __iomem void *rt_memc_membase;
28 
29 __iomem void *plat_of_remap_node(const char *node)
30 {
31 	struct resource res;
32 	struct device_node *np;
33 
34 	np = of_find_compatible_node(NULL, NULL, node);
35 	if (!np)
36 		panic("Failed to find %s node", node);
37 
38 	if (of_address_to_resource(np, 0, &res))
39 		panic("Failed to get resource for %s", node);
40 
41 	if (!request_mem_region(res.start,
42 				resource_size(&res),
43 				res.name))
44 		panic("Failed to request resources for %s", node);
45 
46 	return ioremap_nocache(res.start, resource_size(&res));
47 }
48 
49 void __init device_tree_init(void)
50 {
51 	unflatten_and_copy_device_tree();
52 }
53 
54 static int memory_dtb;
55 
56 static int __init early_init_dt_find_memory(unsigned long node,
57 				const char *uname, int depth, void *data)
58 {
59 	if (depth == 1 && !strcmp(uname, "memory@0"))
60 		memory_dtb = 1;
61 
62 	return 0;
63 }
64 
65 void __init plat_mem_setup(void)
66 {
67 	void *dtb = NULL;
68 
69 	set_io_port_base(KSEG1);
70 
71 	/*
72 	 * Load the builtin devicetree. This causes the chosen node to be
73 	 * parsed resulting in our memory appearing. fw_passed_dtb is used
74 	 * by CONFIG_MIPS_APPENDED_RAW_DTB as well.
75 	 */
76 	if (fw_passed_dtb)
77 		dtb = (void *)fw_passed_dtb;
78 	else if (__dtb_start != __dtb_end)
79 		dtb = (void *)__dtb_start;
80 
81 	__dt_setup_arch(dtb);
82 
83 	of_scan_flat_dt(early_init_dt_find_memory, NULL);
84 	if (memory_dtb)
85 		of_scan_flat_dt(early_init_dt_scan_memory, NULL);
86 	else if (soc_info.mem_size)
87 		add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M,
88 				  BOOT_MEM_RAM);
89 	else
90 		detect_memory_region(soc_info.mem_base,
91 				     soc_info.mem_size_min * SZ_1M,
92 				     soc_info.mem_size_max * SZ_1M);
93 }
94 
95 static int __init plat_of_setup(void)
96 {
97 	__dt_register_buses(soc_info.compatible, "palmbus");
98 
99 	/* make sure that the reset controller is setup early */
100 	ralink_rst_init();
101 
102 	return 0;
103 }
104 
105 arch_initcall(plat_of_setup);
106