xref: /linux/arch/mips/ralink/early_printk.c (revision c4ee0af3fa0dc65f690fc908f02b8355f9576ea0)
1 /*
2  *  This program is free software; you can redistribute it and/or modify it
3  *  under the terms of the GNU General Public License version 2 as published
4  *  by the Free Software Foundation.
5  *
6  *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
7  */
8 
9 #include <linux/io.h>
10 #include <linux/serial_reg.h>
11 
12 #include <asm/addrspace.h>
13 
14 #ifdef CONFIG_SOC_RT288X
15 #define EARLY_UART_BASE         0x300c00
16 #else
17 #define EARLY_UART_BASE         0x10000c00
18 #endif
19 
20 #define UART_REG_RX             0x00
21 #define UART_REG_TX             0x04
22 #define UART_REG_IER            0x08
23 #define UART_REG_IIR            0x0c
24 #define UART_REG_FCR            0x10
25 #define UART_REG_LCR            0x14
26 #define UART_REG_MCR            0x18
27 #define UART_REG_LSR            0x1c
28 
29 static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
30 
31 static inline void uart_w32(u32 val, unsigned reg)
32 {
33 	__raw_writel(val, uart_membase + reg);
34 }
35 
36 static inline u32 uart_r32(unsigned reg)
37 {
38 	return __raw_readl(uart_membase + reg);
39 }
40 
41 void prom_putchar(unsigned char ch)
42 {
43 	while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
44 		;
45 	uart_w32(ch, UART_REG_TX);
46 	while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
47 		;
48 }
49