xref: /linux/arch/mips/ralink/clk.c (revision 03f7c1d2a49acd30e38789cd809d3300721e9b0e)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2013 John Crispin <john@phrozen.org>
6  */
7 
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/export.h>
11 #include <linux/clkdev.h>
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 
15 #include <asm/time.h>
16 
17 #include "common.h"
18 
19 void ralink_clk_add(const char *dev, unsigned long rate)
20 {
21 	struct clk *clk = clk_register_fixed_rate(NULL, dev, NULL, 0, rate);
22 
23 	if (!clk)
24 		panic("failed to add clock");
25 
26 	clkdev_create(clk, NULL, "%s", dev);
27 }
28 
29 void __init plat_time_init(void)
30 {
31 	struct clk *clk;
32 
33 	ralink_of_remap();
34 
35 	ralink_clk_init();
36 	clk = clk_get_sys("cpu", NULL);
37 	if (IS_ERR(clk))
38 		panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
39 	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
40 	mips_hpt_frequency = clk_get_rate(clk) / 2;
41 	clk_put(clk);
42 	timer_probe();
43 }
44