1*89d63fe1SAtsushi Nemoto /* 2*89d63fe1SAtsushi Nemoto * linux/arch/mips/pci/pci-tx4938.c 3*89d63fe1SAtsushi Nemoto * 4*89d63fe1SAtsushi Nemoto * Based on linux/arch/mips/txx9/rbtx4938/setup.c, 5*89d63fe1SAtsushi Nemoto * and RBTX49xx patch from CELF patch archive. 6*89d63fe1SAtsushi Nemoto * 7*89d63fe1SAtsushi Nemoto * Copyright 2001, 2003-2005 MontaVista Software Inc. 8*89d63fe1SAtsushi Nemoto * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 9*89d63fe1SAtsushi Nemoto * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 10*89d63fe1SAtsushi Nemoto * 11*89d63fe1SAtsushi Nemoto * This file is subject to the terms and conditions of the GNU General Public 12*89d63fe1SAtsushi Nemoto * License. See the file "COPYING" in the main directory of this archive 13*89d63fe1SAtsushi Nemoto * for more details. 14*89d63fe1SAtsushi Nemoto */ 15*89d63fe1SAtsushi Nemoto #include <linux/init.h> 16*89d63fe1SAtsushi Nemoto #include <linux/pci.h> 17*89d63fe1SAtsushi Nemoto #include <linux/kernel.h> 18*89d63fe1SAtsushi Nemoto #include <asm/txx9/generic.h> 19*89d63fe1SAtsushi Nemoto #include <asm/txx9/tx4938.h> 20*89d63fe1SAtsushi Nemoto 21*89d63fe1SAtsushi Nemoto int __init tx4938_report_pciclk(void) 22*89d63fe1SAtsushi Nemoto { 23*89d63fe1SAtsushi Nemoto int pciclk = 0; 24*89d63fe1SAtsushi Nemoto 25*89d63fe1SAtsushi Nemoto printk(KERN_INFO "PCIC --%s PCICLK:", 26*89d63fe1SAtsushi Nemoto (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ? 27*89d63fe1SAtsushi Nemoto " PCI66" : ""); 28*89d63fe1SAtsushi Nemoto if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { 29*89d63fe1SAtsushi Nemoto u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); 30*89d63fe1SAtsushi Nemoto switch ((unsigned long)ccfg & 31*89d63fe1SAtsushi Nemoto TX4938_CCFG_PCIDIVMODE_MASK) { 32*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_4: 33*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 4; break; 34*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_4_5: 35*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock * 2 / 9; break; 36*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_5: 37*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 5; break; 38*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_5_5: 39*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock * 2 / 11; break; 40*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_8: 41*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 8; break; 42*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_9: 43*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 9; break; 44*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_10: 45*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 10; break; 46*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_11: 47*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 11; break; 48*89d63fe1SAtsushi Nemoto } 49*89d63fe1SAtsushi Nemoto printk("Internal(%u.%uMHz)", 50*89d63fe1SAtsushi Nemoto (pciclk + 50000) / 1000000, 51*89d63fe1SAtsushi Nemoto ((pciclk + 50000) / 100000) % 10); 52*89d63fe1SAtsushi Nemoto } else { 53*89d63fe1SAtsushi Nemoto printk("External"); 54*89d63fe1SAtsushi Nemoto pciclk = -1; 55*89d63fe1SAtsushi Nemoto } 56*89d63fe1SAtsushi Nemoto printk("\n"); 57*89d63fe1SAtsushi Nemoto return pciclk; 58*89d63fe1SAtsushi Nemoto } 59*89d63fe1SAtsushi Nemoto 60*89d63fe1SAtsushi Nemoto void __init tx4938_report_pci1clk(void) 61*89d63fe1SAtsushi Nemoto { 62*89d63fe1SAtsushi Nemoto __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); 63*89d63fe1SAtsushi Nemoto unsigned int pciclk = 64*89d63fe1SAtsushi Nemoto txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2); 65*89d63fe1SAtsushi Nemoto 66*89d63fe1SAtsushi Nemoto printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n", 67*89d63fe1SAtsushi Nemoto (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "", 68*89d63fe1SAtsushi Nemoto (pciclk + 50000) / 1000000, 69*89d63fe1SAtsushi Nemoto ((pciclk + 50000) / 100000) % 10); 70*89d63fe1SAtsushi Nemoto } 71*89d63fe1SAtsushi Nemoto 72*89d63fe1SAtsushi Nemoto int __init tx4938_pciclk66_setup(void) 73*89d63fe1SAtsushi Nemoto { 74*89d63fe1SAtsushi Nemoto int pciclk; 75*89d63fe1SAtsushi Nemoto 76*89d63fe1SAtsushi Nemoto /* Assert M66EN */ 77*89d63fe1SAtsushi Nemoto tx4938_ccfg_set(TX4938_CCFG_PCI66); 78*89d63fe1SAtsushi Nemoto /* Double PCICLK (if possible) */ 79*89d63fe1SAtsushi Nemoto if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { 80*89d63fe1SAtsushi Nemoto unsigned int pcidivmode = 0; 81*89d63fe1SAtsushi Nemoto u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); 82*89d63fe1SAtsushi Nemoto pcidivmode = (unsigned long)ccfg & 83*89d63fe1SAtsushi Nemoto TX4938_CCFG_PCIDIVMODE_MASK; 84*89d63fe1SAtsushi Nemoto switch (pcidivmode) { 85*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_8: 86*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_4: 87*89d63fe1SAtsushi Nemoto pcidivmode = TX4938_CCFG_PCIDIVMODE_4; 88*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 4; 89*89d63fe1SAtsushi Nemoto break; 90*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_9: 91*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_4_5: 92*89d63fe1SAtsushi Nemoto pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5; 93*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock * 2 / 9; 94*89d63fe1SAtsushi Nemoto break; 95*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_10: 96*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_5: 97*89d63fe1SAtsushi Nemoto pcidivmode = TX4938_CCFG_PCIDIVMODE_5; 98*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock / 5; 99*89d63fe1SAtsushi Nemoto break; 100*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_11: 101*89d63fe1SAtsushi Nemoto case TX4938_CCFG_PCIDIVMODE_5_5: 102*89d63fe1SAtsushi Nemoto default: 103*89d63fe1SAtsushi Nemoto pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5; 104*89d63fe1SAtsushi Nemoto pciclk = txx9_cpu_clock * 2 / 11; 105*89d63fe1SAtsushi Nemoto break; 106*89d63fe1SAtsushi Nemoto } 107*89d63fe1SAtsushi Nemoto tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK, 108*89d63fe1SAtsushi Nemoto pcidivmode); 109*89d63fe1SAtsushi Nemoto printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n", 110*89d63fe1SAtsushi Nemoto (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg)); 111*89d63fe1SAtsushi Nemoto } else 112*89d63fe1SAtsushi Nemoto pciclk = -1; 113*89d63fe1SAtsushi Nemoto return pciclk; 114*89d63fe1SAtsushi Nemoto } 115*89d63fe1SAtsushi Nemoto 116*89d63fe1SAtsushi Nemoto int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot) 117*89d63fe1SAtsushi Nemoto { 118*89d63fe1SAtsushi Nemoto if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) { 119*89d63fe1SAtsushi Nemoto switch (slot) { 120*89d63fe1SAtsushi Nemoto case TX4927_PCIC_IDSEL_AD_TO_SLOT(31): 121*89d63fe1SAtsushi Nemoto if (__raw_readq(&tx4938_ccfgptr->pcfg) & 122*89d63fe1SAtsushi Nemoto TX4938_PCFG_ETH0_SEL) 123*89d63fe1SAtsushi Nemoto return TXX9_IRQ_BASE + TX4938_IR_ETH0; 124*89d63fe1SAtsushi Nemoto break; 125*89d63fe1SAtsushi Nemoto case TX4927_PCIC_IDSEL_AD_TO_SLOT(30): 126*89d63fe1SAtsushi Nemoto if (__raw_readq(&tx4938_ccfgptr->pcfg) & 127*89d63fe1SAtsushi Nemoto TX4938_PCFG_ETH1_SEL) 128*89d63fe1SAtsushi Nemoto return TXX9_IRQ_BASE + TX4938_IR_ETH1; 129*89d63fe1SAtsushi Nemoto break; 130*89d63fe1SAtsushi Nemoto } 131*89d63fe1SAtsushi Nemoto return 0; 132*89d63fe1SAtsushi Nemoto } 133*89d63fe1SAtsushi Nemoto return -1; 134*89d63fe1SAtsushi Nemoto } 135