1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 Imagination Technologies 4 * Author: Paul Burton <paul.burton@mips.com> 5 * 6 * pcibios_align_resource taken from arch/arm/kernel/bios32.c. 7 */ 8 9 #include <linux/pci.h> 10 11 /* 12 * We need to avoid collisions with `mirrored' VGA ports 13 * and other strange ISA hardware, so we always want the 14 * addresses to be allocated in the 0x000-0x0ff region 15 * modulo 0x400. 16 * 17 * Why? Because some silly external IO cards only decode 18 * the low 10 bits of the IO address. The 0x00-0xff region 19 * is reserved for motherboard devices that decode all 16 20 * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 21 * but we want to try to avoid allocating at 0x2900-0x2bff 22 * which might have be mirrored at 0x0100-0x03ff.. 23 */ 24 resource_size_t pcibios_align_resource(void *data, const struct resource *res, 25 const struct resource *empty_res, 26 resource_size_t size, resource_size_t align) 27 { 28 struct pci_dev *dev = data; 29 resource_size_t start = res->start; 30 struct pci_host_bridge *host_bridge; 31 32 if (res->flags & IORESOURCE_IO && start & 0x300) 33 start = (start + 0x3ff) & ~0x3ff; 34 35 host_bridge = pci_find_host_bridge(dev->bus); 36 37 if (host_bridge->align_resource) 38 return host_bridge->align_resource(dev, res, 39 start, size, align); 40 41 if (res->flags & IORESOURCE_MEM) 42 return pci_align_resource(dev, res, empty_res, size, align); 43 44 return start; 45 } 46 47 void pcibios_fixup_bus(struct pci_bus *bus) 48 { 49 pci_read_bridge_bases(bus); 50 } 51 52 #ifdef pci_remap_iospace 53 int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) 54 { 55 unsigned long vaddr; 56 57 if (res->start != 0) { 58 WARN_ONCE(1, "resource start address is not zero\n"); 59 return -ENODEV; 60 } 61 62 vaddr = (unsigned long)ioremap(phys_addr, resource_size(res)); 63 set_io_port_base(vaddr); 64 return 0; 65 } 66 #endif 67