1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 2000 Ralf Baechle 7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 9 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 10 */ 11 #include <linux/bug.h> 12 #include <linux/init.h> 13 #include <linux/module.h> 14 #include <linux/signal.h> 15 #include <linux/sched.h> 16 #include <linux/smp.h> 17 #include <linux/kernel.h> 18 #include <linux/errno.h> 19 #include <linux/string.h> 20 #include <linux/types.h> 21 #include <linux/pagemap.h> 22 #include <linux/ptrace.h> 23 #include <linux/mman.h> 24 #include <linux/mm.h> 25 #include <linux/bootmem.h> 26 #include <linux/highmem.h> 27 #include <linux/swap.h> 28 #include <linux/proc_fs.h> 29 #include <linux/pfn.h> 30 #include <linux/hardirq.h> 31 #include <linux/gfp.h> 32 #include <linux/kcore.h> 33 34 #include <asm/asm-offsets.h> 35 #include <asm/bootinfo.h> 36 #include <asm/cachectl.h> 37 #include <asm/cpu.h> 38 #include <asm/dma.h> 39 #include <asm/kmap_types.h> 40 #include <asm/maar.h> 41 #include <asm/mmu_context.h> 42 #include <asm/sections.h> 43 #include <asm/pgtable.h> 44 #include <asm/pgalloc.h> 45 #include <asm/tlb.h> 46 #include <asm/fixmap.h> 47 48 /* 49 * We have up to 8 empty zeroed pages so we can map one of the right colour 50 * when needed. This is necessary only on R4000 / R4400 SC and MC versions 51 * where we have to avoid VCED / VECI exceptions for good performance at 52 * any price. Since page is never written to after the initialization we 53 * don't have to care about aliases on other CPUs. 54 */ 55 unsigned long empty_zero_page, zero_page_mask; 56 EXPORT_SYMBOL_GPL(empty_zero_page); 57 EXPORT_SYMBOL(zero_page_mask); 58 59 /* 60 * Not static inline because used by IP27 special magic initialization code 61 */ 62 void setup_zero_pages(void) 63 { 64 unsigned int order, i; 65 struct page *page; 66 67 if (cpu_has_vce) 68 order = 3; 69 else 70 order = 0; 71 72 empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); 73 if (!empty_zero_page) 74 panic("Oh boy, that early out of memory?"); 75 76 page = virt_to_page((void *)empty_zero_page); 77 split_page(page, order); 78 for (i = 0; i < (1 << order); i++, page++) 79 mark_page_reserved(page); 80 81 zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK; 82 } 83 84 static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot) 85 { 86 enum fixed_addresses idx; 87 unsigned long vaddr, flags, entrylo; 88 unsigned long old_ctx; 89 pte_t pte; 90 int tlbidx; 91 92 BUG_ON(Page_dcache_dirty(page)); 93 94 preempt_disable(); 95 pagefault_disable(); 96 idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); 97 idx += in_interrupt() ? FIX_N_COLOURS : 0; 98 vaddr = __fix_to_virt(FIX_CMAP_END - idx); 99 pte = mk_pte(page, prot); 100 #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 101 entrylo = pte_to_entrylo(pte.pte_high); 102 #else 103 entrylo = pte_to_entrylo(pte_val(pte)); 104 #endif 105 106 local_irq_save(flags); 107 old_ctx = read_c0_entryhi(); 108 write_c0_entryhi(vaddr & (PAGE_MASK << 1)); 109 write_c0_entrylo0(entrylo); 110 write_c0_entrylo1(entrylo); 111 #ifdef CONFIG_XPA 112 entrylo = (pte.pte_low & _PFNX_MASK); 113 writex_c0_entrylo0(entrylo); 114 writex_c0_entrylo1(entrylo); 115 #endif 116 tlbidx = read_c0_wired(); 117 write_c0_wired(tlbidx + 1); 118 write_c0_index(tlbidx); 119 mtc0_tlbw_hazard(); 120 tlb_write_indexed(); 121 tlbw_use_hazard(); 122 write_c0_entryhi(old_ctx); 123 local_irq_restore(flags); 124 125 return (void*) vaddr; 126 } 127 128 void *kmap_coherent(struct page *page, unsigned long addr) 129 { 130 return __kmap_pgprot(page, addr, PAGE_KERNEL); 131 } 132 133 void *kmap_noncoherent(struct page *page, unsigned long addr) 134 { 135 return __kmap_pgprot(page, addr, PAGE_KERNEL_NC); 136 } 137 138 void kunmap_coherent(void) 139 { 140 unsigned int wired; 141 unsigned long flags, old_ctx; 142 143 local_irq_save(flags); 144 old_ctx = read_c0_entryhi(); 145 wired = read_c0_wired() - 1; 146 write_c0_wired(wired); 147 write_c0_index(wired); 148 write_c0_entryhi(UNIQUE_ENTRYHI(wired)); 149 write_c0_entrylo0(0); 150 write_c0_entrylo1(0); 151 mtc0_tlbw_hazard(); 152 tlb_write_indexed(); 153 tlbw_use_hazard(); 154 write_c0_entryhi(old_ctx); 155 local_irq_restore(flags); 156 pagefault_enable(); 157 preempt_enable(); 158 } 159 160 void copy_user_highpage(struct page *to, struct page *from, 161 unsigned long vaddr, struct vm_area_struct *vma) 162 { 163 void *vfrom, *vto; 164 165 vto = kmap_atomic(to); 166 if (cpu_has_dc_aliases && 167 page_mapped(from) && !Page_dcache_dirty(from)) { 168 vfrom = kmap_coherent(from, vaddr); 169 copy_page(vto, vfrom); 170 kunmap_coherent(); 171 } else { 172 vfrom = kmap_atomic(from); 173 copy_page(vto, vfrom); 174 kunmap_atomic(vfrom); 175 } 176 if ((!cpu_has_ic_fills_f_dc) || 177 pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) 178 flush_data_cache_page((unsigned long)vto); 179 kunmap_atomic(vto); 180 /* Make sure this page is cleared on other CPU's too before using it */ 181 smp_wmb(); 182 } 183 184 void copy_to_user_page(struct vm_area_struct *vma, 185 struct page *page, unsigned long vaddr, void *dst, const void *src, 186 unsigned long len) 187 { 188 if (cpu_has_dc_aliases && 189 page_mapped(page) && !Page_dcache_dirty(page)) { 190 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 191 memcpy(vto, src, len); 192 kunmap_coherent(); 193 } else { 194 memcpy(dst, src, len); 195 if (cpu_has_dc_aliases) 196 SetPageDcacheDirty(page); 197 } 198 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) 199 flush_cache_page(vma, vaddr, page_to_pfn(page)); 200 } 201 202 void copy_from_user_page(struct vm_area_struct *vma, 203 struct page *page, unsigned long vaddr, void *dst, const void *src, 204 unsigned long len) 205 { 206 if (cpu_has_dc_aliases && 207 page_mapped(page) && !Page_dcache_dirty(page)) { 208 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 209 memcpy(dst, vfrom, len); 210 kunmap_coherent(); 211 } else { 212 memcpy(dst, src, len); 213 if (cpu_has_dc_aliases) 214 SetPageDcacheDirty(page); 215 } 216 } 217 EXPORT_SYMBOL_GPL(copy_from_user_page); 218 219 void __init fixrange_init(unsigned long start, unsigned long end, 220 pgd_t *pgd_base) 221 { 222 #ifdef CONFIG_HIGHMEM 223 pgd_t *pgd; 224 pud_t *pud; 225 pmd_t *pmd; 226 pte_t *pte; 227 int i, j, k; 228 unsigned long vaddr; 229 230 vaddr = start; 231 i = __pgd_offset(vaddr); 232 j = __pud_offset(vaddr); 233 k = __pmd_offset(vaddr); 234 pgd = pgd_base + i; 235 236 for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) { 237 pud = (pud_t *)pgd; 238 for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) { 239 pmd = (pmd_t *)pud; 240 for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) { 241 if (pmd_none(*pmd)) { 242 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 243 set_pmd(pmd, __pmd((unsigned long)pte)); 244 BUG_ON(pte != pte_offset_kernel(pmd, 0)); 245 } 246 vaddr += PMD_SIZE; 247 } 248 k = 0; 249 } 250 j = 0; 251 } 252 #endif 253 } 254 255 #ifndef CONFIG_NEED_MULTIPLE_NODES 256 int page_is_ram(unsigned long pagenr) 257 { 258 int i; 259 260 for (i = 0; i < boot_mem_map.nr_map; i++) { 261 unsigned long addr, end; 262 263 switch (boot_mem_map.map[i].type) { 264 case BOOT_MEM_RAM: 265 case BOOT_MEM_INIT_RAM: 266 break; 267 default: 268 /* not usable memory */ 269 continue; 270 } 271 272 addr = PFN_UP(boot_mem_map.map[i].addr); 273 end = PFN_DOWN(boot_mem_map.map[i].addr + 274 boot_mem_map.map[i].size); 275 276 if (pagenr >= addr && pagenr < end) 277 return 1; 278 } 279 280 return 0; 281 } 282 283 void __init paging_init(void) 284 { 285 unsigned long max_zone_pfns[MAX_NR_ZONES]; 286 unsigned long lastpfn __maybe_unused; 287 288 pagetable_init(); 289 290 #ifdef CONFIG_HIGHMEM 291 kmap_init(); 292 #endif 293 #ifdef CONFIG_ZONE_DMA 294 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; 295 #endif 296 #ifdef CONFIG_ZONE_DMA32 297 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; 298 #endif 299 max_zone_pfns[ZONE_NORMAL] = max_low_pfn; 300 lastpfn = max_low_pfn; 301 #ifdef CONFIG_HIGHMEM 302 max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; 303 lastpfn = highend_pfn; 304 305 if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { 306 printk(KERN_WARNING "This processor doesn't support highmem." 307 " %ldk highmem ignored\n", 308 (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); 309 max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; 310 lastpfn = max_low_pfn; 311 } 312 #endif 313 314 free_area_init_nodes(max_zone_pfns); 315 } 316 317 #ifdef CONFIG_64BIT 318 static struct kcore_list kcore_kseg0; 319 #endif 320 321 static inline void mem_init_free_highmem(void) 322 { 323 #ifdef CONFIG_HIGHMEM 324 unsigned long tmp; 325 326 for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { 327 struct page *page = pfn_to_page(tmp); 328 329 if (!page_is_ram(tmp)) 330 SetPageReserved(page); 331 else 332 free_highmem_page(page); 333 } 334 #endif 335 } 336 337 unsigned __weak platform_maar_init(unsigned num_pairs) 338 { 339 struct maar_config cfg[BOOT_MEM_MAP_MAX]; 340 unsigned i, num_configured, num_cfg = 0; 341 phys_addr_t skip; 342 343 for (i = 0; i < boot_mem_map.nr_map; i++) { 344 switch (boot_mem_map.map[i].type) { 345 case BOOT_MEM_RAM: 346 case BOOT_MEM_INIT_RAM: 347 break; 348 default: 349 continue; 350 } 351 352 skip = 0x10000 - (boot_mem_map.map[i].addr & 0xffff); 353 354 cfg[num_cfg].lower = boot_mem_map.map[i].addr; 355 cfg[num_cfg].lower += skip; 356 357 cfg[num_cfg].upper = cfg[num_cfg].lower; 358 cfg[num_cfg].upper += boot_mem_map.map[i].size - 1; 359 cfg[num_cfg].upper -= skip; 360 361 cfg[num_cfg].attrs = MIPS_MAAR_S; 362 num_cfg++; 363 } 364 365 num_configured = maar_config(cfg, num_cfg, num_pairs); 366 if (num_configured < num_cfg) 367 pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n", 368 num_pairs, num_cfg); 369 370 return num_configured; 371 } 372 373 static void maar_init(void) 374 { 375 unsigned num_maars, used, i; 376 377 if (!cpu_has_maar) 378 return; 379 380 /* Detect the number of MAARs */ 381 write_c0_maari(~0); 382 back_to_back_c0_hazard(); 383 num_maars = read_c0_maari() + 1; 384 385 /* MAARs should be in pairs */ 386 WARN_ON(num_maars % 2); 387 388 /* Configure the required MAARs */ 389 used = platform_maar_init(num_maars / 2); 390 391 /* Disable any further MAARs */ 392 for (i = (used * 2); i < num_maars; i++) { 393 write_c0_maari(i); 394 back_to_back_c0_hazard(); 395 write_c0_maar(0); 396 back_to_back_c0_hazard(); 397 } 398 } 399 400 void __init mem_init(void) 401 { 402 #ifdef CONFIG_HIGHMEM 403 #ifdef CONFIG_DISCONTIGMEM 404 #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" 405 #endif 406 max_mapnr = highend_pfn ? highend_pfn : max_low_pfn; 407 #else 408 max_mapnr = max_low_pfn; 409 #endif 410 high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); 411 412 maar_init(); 413 free_all_bootmem(); 414 setup_zero_pages(); /* Setup zeroed pages. */ 415 mem_init_free_highmem(); 416 mem_init_print_info(NULL); 417 418 #ifdef CONFIG_64BIT 419 if ((unsigned long) &_text > (unsigned long) CKSEG0) 420 /* The -4 is a hack so that user tools don't have to handle 421 the overflow. */ 422 kclist_add(&kcore_kseg0, (void *) CKSEG0, 423 0x80000000 - 4, KCORE_TEXT); 424 #endif 425 } 426 #endif /* !CONFIG_NEED_MULTIPLE_NODES */ 427 428 void free_init_pages(const char *what, unsigned long begin, unsigned long end) 429 { 430 unsigned long pfn; 431 432 for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { 433 struct page *page = pfn_to_page(pfn); 434 void *addr = phys_to_virt(PFN_PHYS(pfn)); 435 436 memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); 437 free_reserved_page(page); 438 } 439 printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); 440 } 441 442 #ifdef CONFIG_BLK_DEV_INITRD 443 void free_initrd_mem(unsigned long start, unsigned long end) 444 { 445 free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM, 446 "initrd"); 447 } 448 #endif 449 450 void (*free_init_pages_eva)(void *begin, void *end) = NULL; 451 452 void __init_refok free_initmem(void) 453 { 454 prom_free_prom_memory(); 455 /* 456 * Let the platform define a specific function to free the 457 * init section since EVA may have used any possible mapping 458 * between virtual and physical addresses. 459 */ 460 if (free_init_pages_eva) 461 free_init_pages_eva((void *)&__init_begin, (void *)&__init_end); 462 else 463 free_initmem_default(POISON_FREE_INITMEM); 464 } 465 466 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT 467 unsigned long pgd_current[NR_CPUS]; 468 #endif 469 470 /* 471 * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER 472 * are constants. So we use the variants from asm-offset.h until that gcc 473 * will officially be retired. 474 * 475 * Align swapper_pg_dir in to 64K, allows its address to be loaded 476 * with a single LUI instruction in the TLB handlers. If we used 477 * __aligned(64K), its size would get rounded up to the alignment 478 * size, and waste space. So we place it in its own section and align 479 * it in the linker script. 480 */ 481 pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir); 482 #ifndef __PAGETABLE_PMD_FOLDED 483 pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss; 484 #endif 485 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; 486