xref: /linux/arch/mips/math-emu/sp_fdp.c (revision 37744feebc086908fd89760650f458ab19071750)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* IEEE754 floating point arithmetic
3  * single precision
4  */
5 /*
6  * MIPS floating point support
7  * Copyright (C) 1994-2000 Algorithmics Ltd.
8  */
9 
10 #include "ieee754sp.h"
11 #include "ieee754dp.h"
12 
13 static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
14 {
15 	return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
16 		       xm >> (DP_FBITS - SP_FBITS));
17 }
18 
19 union ieee754sp ieee754sp_fdp(union ieee754dp x)
20 {
21 	union ieee754sp y;
22 	u32 rm;
23 
24 	COMPXDP;
25 	COMPYSP;
26 
27 	EXPLODEXDP;
28 
29 	ieee754_clearcx();
30 
31 	FLUSHXDP;
32 
33 	switch (xc) {
34 	case IEEE754_CLASS_SNAN:
35 		x = ieee754dp_nanxcpt(x);
36 		EXPLODEXDP;
37 		/* fall through */
38 
39 	case IEEE754_CLASS_QNAN:
40 		y = ieee754sp_nan_fdp(xs, xm);
41 		if (!ieee754_csr.nan2008) {
42 			EXPLODEYSP;
43 			if (!ieee754_class_nan(yc))
44 				y = ieee754sp_indef();
45 		}
46 		return y;
47 
48 	case IEEE754_CLASS_INF:
49 		return ieee754sp_inf(xs);
50 
51 	case IEEE754_CLASS_ZERO:
52 		return ieee754sp_zero(xs);
53 
54 	case IEEE754_CLASS_DNORM:
55 		/* can't possibly be sp representable */
56 		ieee754_setcx(IEEE754_UNDERFLOW);
57 		ieee754_setcx(IEEE754_INEXACT);
58 		if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
59 				(ieee754_csr.rm == FPU_CSR_RD && xs))
60 			return ieee754sp_mind(xs);
61 		return ieee754sp_zero(xs);
62 
63 	case IEEE754_CLASS_NORM:
64 		break;
65 	}
66 
67 	/*
68 	 * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
69 	 */
70 	rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
71 	     ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
72 
73 	return ieee754sp_format(xs, xe, rm);
74 }
75