xref: /linux/arch/mips/loongson64/init.c (revision c79c3c34f75d72a066e292b10aa50fc758c97c89)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2009 Lemote Inc.
4  * Author: Wu Zhangjin, wuzhangjin@gmail.com
5  */
6 
7 #include <linux/irqchip.h>
8 #include <linux/logic_pio.h>
9 #include <linux/memblock.h>
10 #include <linux/of.h>
11 #include <linux/of_address.h>
12 #include <asm/bootinfo.h>
13 #include <asm/traps.h>
14 #include <asm/smp-ops.h>
15 #include <asm/cacheflush.h>
16 #include <asm/fw/fw.h>
17 
18 #include <loongson.h>
19 #include <boot_param.h>
20 
21 #define NODE_ID_OFFSET_ADDR	((void __iomem *)TO_UNCAC(0x1001041c))
22 
23 u32 node_id_offset;
24 
25 static void __init mips_nmi_setup(void)
26 {
27 	void *base;
28 
29 	base = (void *)(CAC_BASE + 0x380);
30 	memcpy(base, except_vec_nmi, 0x80);
31 	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
32 }
33 
34 void ls7a_early_config(void)
35 {
36 	node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36;
37 }
38 
39 void rs780e_early_config(void)
40 {
41 	node_id_offset = 37;
42 }
43 
44 void virtual_early_config(void)
45 {
46 	node_id_offset = 44;
47 }
48 
49 void __init szmem(unsigned int node)
50 {
51 	u32 i, mem_type;
52 	static unsigned long num_physpages;
53 	u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size;
54 
55 	/* Parse memory information and activate */
56 	for (i = 0; i < loongson_memmap->nr_map; i++) {
57 		node_id = loongson_memmap->map[i].node_id;
58 		if (node_id != node)
59 			continue;
60 
61 		mem_type = loongson_memmap->map[i].mem_type;
62 		mem_size = loongson_memmap->map[i].mem_size;
63 		mem_start = loongson_memmap->map[i].mem_start;
64 
65 		switch (mem_type) {
66 		case SYSTEM_RAM_LOW:
67 		case SYSTEM_RAM_HIGH:
68 			start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
69 			node_psize = (mem_size << 20) >> PAGE_SHIFT;
70 			end_pfn  = start_pfn + node_psize;
71 			num_physpages += node_psize;
72 			pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
73 				(u32)node_id, mem_type, mem_start, mem_size);
74 			pr_info("       start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
75 				start_pfn, end_pfn, num_physpages);
76 			memblock_add_node(PFN_PHYS(start_pfn), PFN_PHYS(node_psize), node);
77 			break;
78 		case SYSTEM_RAM_RESERVED:
79 			pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
80 				(u32)node_id, mem_type, mem_start, mem_size);
81 			memblock_reserve(((node_id << 44) + mem_start), mem_size << 20);
82 			break;
83 		}
84 	}
85 }
86 
87 #ifndef CONFIG_NUMA
88 static void __init prom_init_memory(void)
89 {
90 	szmem(0);
91 }
92 #endif
93 
94 void __init prom_init(void)
95 {
96 	fw_init_cmdline();
97 	prom_init_env();
98 
99 	/* init base address of io space */
100 	set_io_port_base(PCI_IOBASE);
101 
102 	loongson_sysconf.early_config();
103 
104 #ifdef CONFIG_NUMA
105 	prom_init_numa_memory();
106 #else
107 	prom_init_memory();
108 #endif
109 
110 	/* Hardcode to CPU UART 0 */
111 	setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
112 
113 	register_smp_ops(&loongson3_smp_ops);
114 	board_nmi_handler_setup = mips_nmi_setup;
115 }
116 
117 static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start,
118 				    resource_size_t size)
119 {
120 	int ret = 0;
121 	struct logic_pio_hwaddr *range;
122 	unsigned long vaddr;
123 
124 	range = kzalloc(sizeof(*range), GFP_ATOMIC);
125 	if (!range)
126 		return -ENOMEM;
127 
128 	range->fwnode = fwnode;
129 	range->size = size;
130 	range->hw_start = hw_start;
131 	range->flags = LOGIC_PIO_CPU_MMIO;
132 
133 	ret = logic_pio_register_range(range);
134 	if (ret) {
135 		kfree(range);
136 		return ret;
137 	}
138 
139 	/* Legacy ISA must placed at the start of PCI_IOBASE */
140 	if (range->io_start != 0) {
141 		logic_pio_unregister_range(range);
142 		kfree(range);
143 		return -EINVAL;
144 	}
145 
146 	vaddr = PCI_IOBASE + range->io_start;
147 
148 	ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL));
149 
150 	return 0;
151 }
152 
153 static __init void reserve_pio_range(void)
154 {
155 	struct device_node *np;
156 
157 	for_each_node_by_name(np, "isa") {
158 		struct of_range range;
159 		struct of_range_parser parser;
160 
161 		pr_info("ISA Bridge: %pOF\n", np);
162 
163 		if (of_range_parser_init(&parser, np)) {
164 			pr_info("Failed to parse resources.\n");
165 			break;
166 		}
167 
168 		for_each_of_range(&parser, &range) {
169 			switch (range.flags & IORESOURCE_TYPE_BITS) {
170 			case IORESOURCE_IO:
171 				pr_info(" IO 0x%016llx..0x%016llx  ->  0x%016llx\n",
172 					range.cpu_addr,
173 					range.cpu_addr + range.size - 1,
174 					range.bus_addr);
175 				if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size))
176 					pr_warn("Failed to reserve legacy IO in Logic PIO\n");
177 				break;
178 			case IORESOURCE_MEM:
179 				pr_info(" MEM 0x%016llx..0x%016llx  ->  0x%016llx\n",
180 					range.cpu_addr,
181 					range.cpu_addr + range.size - 1,
182 					range.bus_addr);
183 				break;
184 			}
185 		}
186 	}
187 }
188 
189 void __init arch_init_irq(void)
190 {
191 	reserve_pio_range();
192 	irqchip_init();
193 }
194