1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2009 Lemote Inc. 4 * Author: Wu Zhangjin, wuzhangjin@gmail.com 5 */ 6 7 #include <linux/irqchip.h> 8 #include <linux/logic_pio.h> 9 #include <linux/memblock.h> 10 #include <linux/minmax.h> 11 #include <linux/of.h> 12 #include <linux/of_address.h> 13 #include <asm/bootinfo.h> 14 #include <asm/traps.h> 15 #include <asm/smp-ops.h> 16 #include <asm/cacheflush.h> 17 #include <asm/fw/fw.h> 18 19 #include <loongson.h> 20 #include <boot_param.h> 21 22 #define NODE_ID_OFFSET_ADDR ((void __iomem *)TO_UNCAC(0x1001041c)) 23 24 u32 node_id_offset; 25 26 static void __init mips_nmi_setup(void) 27 { 28 void *base; 29 30 base = (void *)(CAC_BASE + 0x380); 31 memcpy(base, except_vec_nmi, 0x80); 32 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); 33 } 34 35 void ls7a_early_config(void) 36 { 37 node_id_offset = ((readl(NODE_ID_OFFSET_ADDR) >> 8) & 0x1f) + 36; 38 } 39 40 void rs780e_early_config(void) 41 { 42 node_id_offset = 37; 43 } 44 45 void virtual_early_config(void) 46 { 47 node_id_offset = 44; 48 } 49 50 void __init szmem(unsigned int node) 51 { 52 u32 i, mem_type; 53 phys_addr_t node_id, mem_start, mem_size; 54 55 /* Otherwise come from DTB */ 56 if (loongson_sysconf.fw_interface != LOONGSON_LEFI) 57 return; 58 59 /* Parse memory information and activate */ 60 for (i = 0; i < loongson_memmap->nr_map; i++) { 61 node_id = loongson_memmap->map[i].node_id; 62 if (node_id != node) 63 continue; 64 65 mem_type = loongson_memmap->map[i].mem_type; 66 mem_size = loongson_memmap->map[i].mem_size; 67 68 /* Memory size comes in MB if MEM_SIZE_IS_IN_BYTES not set */ 69 if (mem_size & MEM_SIZE_IS_IN_BYTES) 70 mem_size &= ~MEM_SIZE_IS_IN_BYTES; 71 else 72 mem_size = mem_size << 20; 73 74 mem_start = (node_id << 44) | loongson_memmap->map[i].mem_start; 75 76 switch (mem_type) { 77 case SYSTEM_RAM_LOW: 78 case SYSTEM_RAM_HIGH: 79 case UMA_VIDEO_RAM: 80 pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes usable\n", 81 (u32)node_id, mem_type, &mem_start, &mem_size); 82 memblock_add_node(mem_start, mem_size, node, 83 MEMBLOCK_NONE); 84 break; 85 case SYSTEM_RAM_RESERVED: 86 case VIDEO_ROM: 87 case ADAPTER_ROM: 88 case ACPI_TABLE: 89 case SMBIOS_TABLE: 90 pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes reserved\n", 91 (u32)node_id, mem_type, &mem_start, &mem_size); 92 memblock_reserve(mem_start, mem_size); 93 break; 94 /* We should not reserve VUMA_VIDEO_RAM as it overlaps with MMIO */ 95 case VUMA_VIDEO_RAM: 96 default: 97 pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes unhandled\n", 98 (u32)node_id, mem_type, &mem_start, &mem_size); 99 break; 100 } 101 } 102 103 /* Reserve vgabios if it comes from firmware */ 104 if (loongson_sysconf.vgabios_addr) 105 memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr), 106 SZ_256K); 107 /* set nid for reserved memory */ 108 memblock_set_node((u64)node << 44, (u64)(node + 1) << 44, 109 &memblock.reserved, node); 110 } 111 112 #ifndef CONFIG_NUMA 113 static void __init prom_init_memory(void) 114 { 115 szmem(0); 116 } 117 #endif 118 119 void __init prom_init(void) 120 { 121 fw_init_cmdline(); 122 123 if (fw_arg2 == 0 || (fdt_magic(fw_arg2) == FDT_MAGIC)) { 124 loongson_sysconf.fw_interface = LOONGSON_DTB; 125 prom_dtb_init_env(); 126 } else { 127 loongson_sysconf.fw_interface = LOONGSON_LEFI; 128 prom_lefi_init_env(); 129 } 130 131 /* init base address of io space */ 132 set_io_port_base((unsigned long)PCI_IOBASE); 133 134 if (loongson_sysconf.early_config) 135 loongson_sysconf.early_config(); 136 137 #ifdef CONFIG_NUMA 138 prom_init_numa_memory(); 139 #else 140 prom_init_memory(); 141 #endif 142 143 /* Hardcode to CPU UART 0 */ 144 if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) 145 setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024); 146 else 147 setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024); 148 149 register_smp_ops(&loongson3_smp_ops); 150 board_nmi_handler_setup = mips_nmi_setup; 151 } 152 153 static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start, 154 resource_size_t size) 155 { 156 int ret = 0; 157 struct logic_pio_hwaddr *range; 158 unsigned long vaddr; 159 160 range = kzalloc_obj(*range, GFP_ATOMIC); 161 if (!range) 162 return -ENOMEM; 163 164 range->fwnode = fwnode; 165 range->size = size = round_up(size, PAGE_SIZE); 166 range->hw_start = hw_start; 167 range->flags = LOGIC_PIO_CPU_MMIO; 168 169 ret = logic_pio_register_range(range); 170 if (ret) { 171 kfree(range); 172 return ret; 173 } 174 175 /* Legacy ISA must placed at the start of PCI_IOBASE */ 176 if (range->io_start != 0) { 177 logic_pio_unregister_range(range); 178 kfree(range); 179 return -EINVAL; 180 } 181 182 vaddr = (unsigned long)PCI_IOBASE + range->io_start; 183 184 vmap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL)); 185 186 return 0; 187 } 188 189 static __init void reserve_pio_range(void) 190 { 191 struct device_node *np; 192 193 for_each_node_by_name(np, "isa") { 194 struct of_range range; 195 struct of_range_parser parser; 196 197 pr_info("ISA Bridge: %pOF\n", np); 198 199 if (of_range_parser_init(&parser, np)) { 200 pr_info("Failed to parse resources.\n"); 201 of_node_put(np); 202 break; 203 } 204 205 for_each_of_range(&parser, &range) { 206 switch (range.flags & IORESOURCE_TYPE_BITS) { 207 case IORESOURCE_IO: 208 pr_info(" IO 0x%016llx..0x%016llx -> 0x%016llx\n", 209 range.cpu_addr, 210 range.cpu_addr + range.size - 1, 211 range.bus_addr); 212 if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size)) 213 pr_warn("Failed to reserve legacy IO in Logic PIO\n"); 214 break; 215 case IORESOURCE_MEM: 216 pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx\n", 217 range.cpu_addr, 218 range.cpu_addr + range.size - 1, 219 range.bus_addr); 220 break; 221 } 222 } 223 } 224 } 225 226 void __init arch_init_irq(void) 227 { 228 reserve_pio_range(); 229 irqchip_init(); 230 } 231 232 unsigned int arch_dynirq_lower_bound(unsigned int from) 233 { 234 return MAX(from, NR_IRQS_LEGACY); 235 } 236