1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Based on Ocelot Linux port, which is 4 * Copyright 2001 MontaVista Software Inc. 5 * Author: jsun@mvista.com or jsun@junsun.net 6 * 7 * Copyright 2003 ICT CAS 8 * Author: Michael Guo <guoyi@ict.ac.cn> 9 * 10 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology 11 * Author: Fuxin Zhang, zhangfx@lemote.com 12 * 13 * Copyright (C) 2009 Lemote Inc. 14 * Author: Wu Zhangjin, wuzhangjin@gmail.com 15 */ 16 17 #include <linux/dma-map-ops.h> 18 #include <linux/export.h> 19 #include <linux/pci_ids.h> 20 #include <asm/bootinfo.h> 21 #include <loongson.h> 22 #include <boot_param.h> 23 #include <builtin_dtbs.h> 24 #include <workarounds.h> 25 26 #define HOST_BRIDGE_CONFIG_ADDR ((void __iomem *)TO_UNCAC(0x1a000000)) 27 28 u32 cpu_clock_freq; 29 EXPORT_SYMBOL(cpu_clock_freq); 30 struct efi_memory_map_loongson *loongson_memmap; 31 struct loongson_system_configuration loongson_sysconf; 32 33 struct board_devices *eboard; 34 struct interface_info *einter; 35 struct loongson_special_attribute *especial; 36 37 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180}; 38 u64 loongson_chiptemp[MAX_PACKAGES]; 39 u64 loongson_freqctrl[MAX_PACKAGES]; 40 41 unsigned long long smp_group[4]; 42 43 const char *get_system_type(void) 44 { 45 return "Generic Loongson64 System"; 46 } 47 48 49 void __init prom_dtb_init_env(void) 50 { 51 if ((fw_arg2 < CKSEG0 || fw_arg2 > CKSEG1) 52 && (fw_arg2 < XKPHYS || fw_arg2 > XKSEG)) 53 54 loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin; 55 else 56 loongson_fdt_blob = (void *)fw_arg2; 57 } 58 59 void __init prom_lefi_init_env(void) 60 { 61 struct boot_params *boot_p; 62 struct loongson_params *loongson_p; 63 struct system_loongson *esys; 64 struct efi_cpuinfo_loongson *ecpu; 65 struct irq_source_routing_table *eirq_source; 66 u32 id; 67 u16 vendor; 68 69 /* firmware arguments are initialized in head.S */ 70 boot_p = (struct boot_params *)fw_arg2; 71 loongson_p = &(boot_p->efi.smbios.lp); 72 73 esys = (struct system_loongson *) 74 ((u64)loongson_p + loongson_p->system_offset); 75 ecpu = (struct efi_cpuinfo_loongson *) 76 ((u64)loongson_p + loongson_p->cpu_offset); 77 eboard = (struct board_devices *) 78 ((u64)loongson_p + loongson_p->boarddev_table_offset); 79 einter = (struct interface_info *) 80 ((u64)loongson_p + loongson_p->interface_offset); 81 especial = (struct loongson_special_attribute *) 82 ((u64)loongson_p + loongson_p->special_offset); 83 eirq_source = (struct irq_source_routing_table *) 84 ((u64)loongson_p + loongson_p->irq_offset); 85 loongson_memmap = (struct efi_memory_map_loongson *) 86 ((u64)loongson_p + loongson_p->memory_offset); 87 88 cpu_clock_freq = ecpu->cpu_clock_freq; 89 loongson_sysconf.cputype = ecpu->cputype; 90 switch (ecpu->cputype) { 91 case Legacy_2K: 92 case Loongson_2K: 93 smp_group[0] = 0x900000001fe11000; 94 loongson_sysconf.cores_per_node = 2; 95 loongson_sysconf.cores_per_package = 2; 96 break; 97 case Legacy_3A: 98 case Loongson_3A: 99 loongson_sysconf.cores_per_node = 4; 100 loongson_sysconf.cores_per_package = 4; 101 smp_group[0] = 0x900000003ff01000; 102 smp_group[1] = 0x900010003ff01000; 103 smp_group[2] = 0x900020003ff01000; 104 smp_group[3] = 0x900030003ff01000; 105 loongson_chipcfg[0] = 0x900000001fe00180; 106 loongson_chipcfg[1] = 0x900010001fe00180; 107 loongson_chipcfg[2] = 0x900020001fe00180; 108 loongson_chipcfg[3] = 0x900030001fe00180; 109 loongson_chiptemp[0] = 0x900000001fe0019c; 110 loongson_chiptemp[1] = 0x900010001fe0019c; 111 loongson_chiptemp[2] = 0x900020001fe0019c; 112 loongson_chiptemp[3] = 0x900030001fe0019c; 113 loongson_freqctrl[0] = 0x900000001fe001d0; 114 loongson_freqctrl[1] = 0x900010001fe001d0; 115 loongson_freqctrl[2] = 0x900020001fe001d0; 116 loongson_freqctrl[3] = 0x900030001fe001d0; 117 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ; 118 break; 119 case Legacy_3B: 120 case Loongson_3B: 121 loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */ 122 loongson_sysconf.cores_per_package = 8; 123 smp_group[0] = 0x900000003ff01000; 124 smp_group[1] = 0x900010003ff05000; 125 smp_group[2] = 0x900020003ff09000; 126 smp_group[3] = 0x900030003ff0d000; 127 loongson_chipcfg[0] = 0x900000001fe00180; 128 loongson_chipcfg[1] = 0x900020001fe00180; 129 loongson_chipcfg[2] = 0x900040001fe00180; 130 loongson_chipcfg[3] = 0x900060001fe00180; 131 loongson_chiptemp[0] = 0x900000001fe0019c; 132 loongson_chiptemp[1] = 0x900020001fe0019c; 133 loongson_chiptemp[2] = 0x900040001fe0019c; 134 loongson_chiptemp[3] = 0x900060001fe0019c; 135 loongson_freqctrl[0] = 0x900000001fe001d0; 136 loongson_freqctrl[1] = 0x900020001fe001d0; 137 loongson_freqctrl[2] = 0x900040001fe001d0; 138 loongson_freqctrl[3] = 0x900060001fe001d0; 139 loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG; 140 break; 141 default: 142 loongson_sysconf.cores_per_node = 1; 143 loongson_sysconf.cores_per_package = 1; 144 loongson_chipcfg[0] = 0x900000001fe00180; 145 } 146 147 loongson_sysconf.nr_cpus = ecpu->nr_cpus; 148 loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id; 149 loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask; 150 if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0) 151 loongson_sysconf.nr_cpus = NR_CPUS; 152 loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus + 153 loongson_sysconf.cores_per_node - 1) / 154 loongson_sysconf.cores_per_node; 155 156 loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits; 157 if (loongson_sysconf.dma_mask_bits < 32 || 158 loongson_sysconf.dma_mask_bits > 64) { 159 loongson_sysconf.dma_mask_bits = 32; 160 dma_default_coherent = true; 161 } else { 162 dma_default_coherent = !eirq_source->dma_noncoherent; 163 } 164 165 pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off"); 166 167 loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm; 168 loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown; 169 loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend; 170 171 loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios; 172 pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n", 173 loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr, 174 loongson_sysconf.vgabios_addr); 175 176 loongson_sysconf.workarounds |= esys->workarounds; 177 178 pr_info("CpuClock = %u\n", cpu_clock_freq); 179 180 /* Read the ID of PCI host bridge to detect bridge type */ 181 id = readl(HOST_BRIDGE_CONFIG_ADDR); 182 vendor = id & 0xffff; 183 184 switch (vendor) { 185 case PCI_VENDOR_ID_LOONGSON: 186 pr_info("The bridge chip is LS7A\n"); 187 loongson_sysconf.bridgetype = LS7A; 188 loongson_sysconf.early_config = ls7a_early_config; 189 break; 190 case PCI_VENDOR_ID_AMD: 191 case PCI_VENDOR_ID_ATI: 192 pr_info("The bridge chip is RS780E or SR5690\n"); 193 loongson_sysconf.bridgetype = RS780E; 194 loongson_sysconf.early_config = rs780e_early_config; 195 break; 196 default: 197 pr_info("The bridge chip is VIRTUAL\n"); 198 loongson_sysconf.bridgetype = VIRTUAL; 199 loongson_sysconf.early_config = virtual_early_config; 200 loongson_fdt_blob = __dtb_loongson64v_4core_virtio_begin; 201 break; 202 } 203 204 if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) { 205 switch (read_c0_prid() & PRID_REV_MASK) { 206 case PRID_REV_LOONGSON3A_R1: 207 case PRID_REV_LOONGSON3A_R2_0: 208 case PRID_REV_LOONGSON3A_R2_1: 209 case PRID_REV_LOONGSON3A_R3_0: 210 case PRID_REV_LOONGSON3A_R3_1: 211 switch (loongson_sysconf.bridgetype) { 212 case LS7A: 213 loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin; 214 break; 215 case RS780E: 216 loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin; 217 break; 218 default: 219 break; 220 } 221 break; 222 case PRID_REV_LOONGSON3B_R1: 223 case PRID_REV_LOONGSON3B_R2: 224 if (loongson_sysconf.bridgetype == RS780E) 225 loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin; 226 break; 227 default: 228 break; 229 } 230 } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R) { 231 loongson_fdt_blob = __dtb_loongson64_2core_2k1000_begin; 232 } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) { 233 if (loongson_sysconf.bridgetype == LS7A) 234 loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin; 235 } 236 237 if (!loongson_fdt_blob) 238 pr_err("Failed to determine built-in Loongson64 dtb\n"); 239 } 240