130ad29bbSHuacai Chen# 230ad29bbSHuacai Chen# Loongson Processors' Support 330ad29bbSHuacai Chen# 430ad29bbSHuacai Chen 530ad29bbSHuacai Chen# Only gcc >= 4.4 have Loongson specific support 6*268a2d60SJiaxun Yangcflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap 730ad29bbSHuacai Chencflags-$(CONFIG_CPU_LOONGSON2E) += \ 830ad29bbSHuacai Chen $(call cc-option,-march=loongson2e,-march=r4600) 930ad29bbSHuacai Chencflags-$(CONFIG_CPU_LOONGSON2F) += \ 1030ad29bbSHuacai Chen $(call cc-option,-march=loongson2f,-march=r4600) 1130ad29bbSHuacai Chen# Enable the workarounds for Loongson2f 1230ad29bbSHuacai Chenifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS 1330ad29bbSHuacai Chen ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),) 1430ad29bbSHuacai Chen $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop) 1530ad29bbSHuacai Chen else 1630ad29bbSHuacai Chen cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop 1730ad29bbSHuacai Chen endif 1830ad29bbSHuacai Chen ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),) 1930ad29bbSHuacai Chen $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump) 2030ad29bbSHuacai Chen else 2130ad29bbSHuacai Chen cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump 2230ad29bbSHuacai Chen endif 2330ad29bbSHuacai Chenendif 2430ad29bbSHuacai Chen 25*268a2d60SJiaxun Yangcflags-$(CONFIG_CPU_LOONGSON64) += -Wa,--trap 26e02e07e3SHuacai Chen 27e02e07e3SHuacai Chen# 28e02e07e3SHuacai Chen# Some versions of binutils, not currently mainline as of 2019/02/04, support 29e02e07e3SHuacai Chen# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction 307f56b123SPaul Burton# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a 31e02e07e3SHuacai Chen# description). 32e02e07e3SHuacai Chen# 33e02e07e3SHuacai Chen# We disable this in order to prevent the assembler meddling with the 34e02e07e3SHuacai Chen# instruction that labels refer to, ie. if we label an ll instruction: 35e02e07e3SHuacai Chen# 36e02e07e3SHuacai Chen# 1: ll v0, 0(a0) 37e02e07e3SHuacai Chen# 38e02e07e3SHuacai Chen# ...then with the assembler fix applied the label may actually point at a sync 39e02e07e3SHuacai Chen# instruction inserted by the assembler, and if we were using the label in an 40e02e07e3SHuacai Chen# exception table the table would no longer contain the address of the ll 41e02e07e3SHuacai Chen# instruction. 42e02e07e3SHuacai Chen# 43e02e07e3SHuacai Chen# Avoid this by explicitly disabling that assembler behaviour. If upstream 44e02e07e3SHuacai Chen# binutils does not merge support for the flag then we can revisit & remove 45e02e07e3SHuacai Chen# this later - for now it ensures vendor toolchains don't cause problems. 46e02e07e3SHuacai Chen# 47*268a2d60SJiaxun Yangcflags-$(CONFIG_CPU_LOONGSON64) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) 48e02e07e3SHuacai Chen 495188129bSHuacai Chen# 505188129bSHuacai Chen# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a 515188129bSHuacai Chen# as MIPS64 R2; older versions as just R1. This leaves the possibility open 525188129bSHuacai Chen# that GCC might generate R2 code for -march=loongson3a which then is rejected 535188129bSHuacai Chen# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a 545188129bSHuacai Chen# can't easily be used safely within the kbuild framework. 555188129bSHuacai Chen# 565188129bSHuacai Chenifeq ($(call cc-ifversion, -ge, 0409, y), y) 57820880cdSHuacai Chen ifeq ($(call ld-ifversion, -ge, 225000000, y), y) 58*268a2d60SJiaxun Yang cflags-$(CONFIG_CPU_LOONGSON64) += \ 595188129bSHuacai Chen $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 605188129bSHuacai Chen else 61*268a2d60SJiaxun Yang cflags-$(CONFIG_CPU_LOONGSON64) += \ 625188129bSHuacai Chen $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 635188129bSHuacai Chen endif 645188129bSHuacai Chenelse 65*268a2d60SJiaxun Yang cflags-$(CONFIG_CPU_LOONGSON64) += \ 665188129bSHuacai Chen $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 675188129bSHuacai Chenendif 685188129bSHuacai Chen 6930ad29bbSHuacai Chen# 7030ad29bbSHuacai Chen# Loongson Machines' Support 7130ad29bbSHuacai Chen# 7230ad29bbSHuacai Chen 7330ad29bbSHuacai Chenplatform-$(CONFIG_MACH_LOONGSON64) += loongson64/ 7430ad29bbSHuacai Chencflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely 7530ad29bbSHuacai Chenload-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 7630ad29bbSHuacai Chenload-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 7730ad29bbSHuacai Chenload-$(CONFIG_LOONGSON_MACH3X) += 0xffffffff80200000 78