xref: /linux/arch/mips/loongson2ef/Platform (revision a1c3be890440a1769ed6f822376a3e3ab0d42994)
1#
2# Loongson Processors' Support
3#
4
5# Only gcc >= 4.4 have Loongson specific support
6cflags-$(CONFIG_CPU_LOONGSON2EF)	+= -Wa,--trap
7cflags-$(CONFIG_CPU_LOONGSON2E) += \
8	$(call cc-option,-march=loongson2e,-march=r4600)
9cflags-$(CONFIG_CPU_LOONGSON2F) += \
10	$(call cc-option,-march=loongson2f,-march=r4600)
11#
12# Some versions of binutils, not currently mainline as of 2019/02/04, support
13# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
14# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
15# description).
16#
17# We disable this in order to prevent the assembler meddling with the
18# instruction that labels refer to, ie. if we label an ll instruction:
19#
20# 1: ll v0, 0(a0)
21#
22# ...then with the assembler fix applied the label may actually point at a sync
23# instruction inserted by the assembler, and if we were using the label in an
24# exception table the table would no longer contain the address of the ll
25# instruction.
26#
27# Avoid this by explicitly disabling that assembler behaviour. If upstream
28# binutils does not merge support for the flag then we can revisit & remove
29# this later - for now it ensures vendor toolchains don't cause problems.
30#
31cflags-$(CONFIG_CPU_LOONGSON2EF)	+= $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
32
33# Enable the workarounds for Loongson2f
34ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
35  ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
36    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
37  else
38    cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
39  endif
40  ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
41    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
42  else
43    cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
44  endif
45endif
46
47# Some -march= flags enable MMI instructions, and GCC complains about that
48# support being enabled alongside -msoft-float. Thus explicitly disable MMI.
49cflags-y += $(call cc-option,-mno-loongson-mmi)
50
51#
52# Loongson Machines' Support
53#
54
55cflags-$(CONFIG_MACH_LOONGSON2EF) += -I$(srctree)/arch/mips/include/asm/mach-loongson2ef -mno-branch-likely
56load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
57load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000
58