171e2f4ddSJiaxun Yang# 271e2f4ddSJiaxun Yang# Loongson Processors' Support 371e2f4ddSJiaxun Yang# 471e2f4ddSJiaxun Yang 571e2f4ddSJiaxun Yangcflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap 613ceb48bSNathan Chancellorcflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e 713ceb48bSNathan Chancellorcflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f 82984b3f8SLichao Liu# 92984b3f8SLichao Liu# Some versions of binutils, not currently mainline as of 2019/02/04, support 102984b3f8SLichao Liu# an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction 112984b3f8SLichao Liu# to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a 122984b3f8SLichao Liu# description). 132984b3f8SLichao Liu# 142984b3f8SLichao Liu# We disable this in order to prevent the assembler meddling with the 152984b3f8SLichao Liu# instruction that labels refer to, ie. if we label an ll instruction: 162984b3f8SLichao Liu# 172984b3f8SLichao Liu# 1: ll v0, 0(a0) 182984b3f8SLichao Liu# 192984b3f8SLichao Liu# ...then with the assembler fix applied the label may actually point at a sync 202984b3f8SLichao Liu# instruction inserted by the assembler, and if we were using the label in an 212984b3f8SLichao Liu# exception table the table would no longer contain the address of the ll 222984b3f8SLichao Liu# instruction. 232984b3f8SLichao Liu# 242984b3f8SLichao Liu# Avoid this by explicitly disabling that assembler behaviour. If upstream 252984b3f8SLichao Liu# binutils does not merge support for the flag then we can revisit & remove 262984b3f8SLichao Liu# this later - for now it ensures vendor toolchains don't cause problems. 272984b3f8SLichao Liu# 282984b3f8SLichao Liucflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) 292984b3f8SLichao Liu 3071e2f4ddSJiaxun Yang# Enable the workarounds for Loongson2f 3171e2f4ddSJiaxun Yangifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS 3213ceb48bSNathan Chancellorcflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop 3313ceb48bSNathan Chancellorcflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump 3471e2f4ddSJiaxun Yangendif 3571e2f4ddSJiaxun Yang 36b13812ddSJiaxun Yang# Some -march= flags enable MMI instructions, and GCC complains about that 37b13812ddSJiaxun Yang# support being enabled alongside -msoft-float. Thus explicitly disable MMI. 38b13812ddSJiaxun Yangcflags-y += $(call cc-option,-mno-loongson-mmi) 39b13812ddSJiaxun Yang 4071e2f4ddSJiaxun Yang# 4171e2f4ddSJiaxun Yang# Loongson Machines' Support 4271e2f4ddSJiaxun Yang# 4371e2f4ddSJiaxun Yang 44*d49fc692SNathan Chancellorcflags-$(CONFIG_MACH_LOONGSON2EF) += -I$(srctree)/arch/mips/include/asm/mach-loongson2ef 45*d49fc692SNathan Chancellorcflags-$(CONFIG_CC_HAS_MNO_BRANCH_LIKELY) += -mno-branch-likely 4671e2f4ddSJiaxun Yangload-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 4771e2f4ddSJiaxun Yangload-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 48