xref: /linux/arch/mips/lib/dump_tlb.c (revision c4c11dd160a8cc98f402c4e12f94b1572e822ffd)
1 /*
2  * Dump R4x00 TLB for debugging purposes.
3  *
4  * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5  * Copyright (C) 1999 by Silicon Graphics, Inc.
6  */
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 
10 #include <asm/mipsregs.h>
11 #include <asm/page.h>
12 #include <asm/pgtable.h>
13 #include <asm/tlbdebug.h>
14 
15 static inline const char *msk2str(unsigned int mask)
16 {
17 	switch (mask) {
18 	case PM_4K:	return "4kb";
19 	case PM_16K:	return "16kb";
20 	case PM_64K:	return "64kb";
21 	case PM_256K:	return "256kb";
22 #ifdef CONFIG_CPU_CAVIUM_OCTEON
23 	case PM_8K:	return "8kb";
24 	case PM_32K:	return "32kb";
25 	case PM_128K:	return "128kb";
26 	case PM_512K:	return "512kb";
27 	case PM_2M:	return "2Mb";
28 	case PM_8M:	return "8Mb";
29 	case PM_32M:	return "32Mb";
30 #endif
31 #ifndef CONFIG_CPU_VR41XX
32 	case PM_1M:	return "1Mb";
33 	case PM_4M:	return "4Mb";
34 	case PM_16M:	return "16Mb";
35 	case PM_64M:	return "64Mb";
36 	case PM_256M:	return "256Mb";
37 	case PM_1G:	return "1Gb";
38 #endif
39 	}
40 	return "";
41 }
42 
43 #define BARRIER()					\
44 	__asm__ __volatile__(				\
45 		".set\tnoreorder\n\t"			\
46 		"nop;nop;nop;nop;nop;nop;nop\n\t"	\
47 		".set\treorder");
48 
49 static void dump_tlb(int first, int last)
50 {
51 	unsigned long s_entryhi, entryhi, asid;
52 	unsigned long long entrylo0, entrylo1;
53 	unsigned int s_index, s_pagemask, pagemask, c0, c1, i;
54 
55 	s_pagemask = read_c0_pagemask();
56 	s_entryhi = read_c0_entryhi();
57 	s_index = read_c0_index();
58 	asid = s_entryhi & 0xff;
59 
60 	for (i = first; i <= last; i++) {
61 		write_c0_index(i);
62 		BARRIER();
63 		tlb_read();
64 		BARRIER();
65 		pagemask = read_c0_pagemask();
66 		entryhi	 = read_c0_entryhi();
67 		entrylo0 = read_c0_entrylo0();
68 		entrylo1 = read_c0_entrylo1();
69 
70 		/* Unused entries have a virtual address of CKSEG0.  */
71 		if ((entryhi & ~0x1ffffUL) != CKSEG0
72 		    && (entryhi & 0xff) == asid) {
73 #ifdef CONFIG_32BIT
74 			int width = 8;
75 #else
76 			int width = 11;
77 #endif
78 			/*
79 			 * Only print entries in use
80 			 */
81 			printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
82 
83 			c0 = (entrylo0 >> 3) & 7;
84 			c1 = (entrylo1 >> 3) & 7;
85 
86 			printk("va=%0*lx asid=%02lx\n",
87 			       width, (entryhi & ~0x1fffUL),
88 			       entryhi & 0xff);
89 			printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
90 			       width,
91 			       (entrylo0 << 6) & PAGE_MASK, c0,
92 			       (entrylo0 & 4) ? 1 : 0,
93 			       (entrylo0 & 2) ? 1 : 0,
94 			       (entrylo0 & 1) ? 1 : 0);
95 			printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n",
96 			       width,
97 			       (entrylo1 << 6) & PAGE_MASK, c1,
98 			       (entrylo1 & 4) ? 1 : 0,
99 			       (entrylo1 & 2) ? 1 : 0,
100 			       (entrylo1 & 1) ? 1 : 0);
101 		}
102 	}
103 	printk("\n");
104 
105 	write_c0_entryhi(s_entryhi);
106 	write_c0_index(s_index);
107 	write_c0_pagemask(s_pagemask);
108 }
109 
110 void dump_tlb_all(void)
111 {
112 	dump_tlb(0, current_cpu_data.tlbsize - 1);
113 }
114