1 /* 2 * Dump R4x00 TLB for debugging purposes. 3 * 4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle. 5 * Copyright (C) 1999 by Silicon Graphics, Inc. 6 */ 7 #include <linux/kernel.h> 8 #include <linux/mm.h> 9 10 #include <asm/mipsregs.h> 11 #include <asm/page.h> 12 #include <asm/pgtable.h> 13 #include <asm/tlbdebug.h> 14 15 static inline const char *msk2str(unsigned int mask) 16 { 17 switch (mask) { 18 case PM_4K: return "4kb"; 19 case PM_16K: return "16kb"; 20 case PM_64K: return "64kb"; 21 case PM_256K: return "256kb"; 22 #ifndef CONFIG_CPU_VR41XX 23 case PM_1M: return "1Mb"; 24 case PM_4M: return "4Mb"; 25 case PM_16M: return "16Mb"; 26 case PM_64M: return "64Mb"; 27 case PM_256M: return "256Mb"; 28 case PM_1G: return "1Gb"; 29 #endif 30 } 31 return ""; 32 } 33 34 #define BARRIER() \ 35 __asm__ __volatile__( \ 36 ".set\tnoreorder\n\t" \ 37 "nop;nop;nop;nop;nop;nop;nop\n\t" \ 38 ".set\treorder"); 39 40 static void dump_tlb(int first, int last) 41 { 42 unsigned long s_entryhi, entryhi, asid; 43 unsigned long long entrylo0, entrylo1; 44 unsigned int s_index, pagemask, c0, c1, i; 45 46 s_entryhi = read_c0_entryhi(); 47 s_index = read_c0_index(); 48 asid = s_entryhi & 0xff; 49 50 for (i = first; i <= last; i++) { 51 write_c0_index(i); 52 BARRIER(); 53 tlb_read(); 54 BARRIER(); 55 pagemask = read_c0_pagemask(); 56 entryhi = read_c0_entryhi(); 57 entrylo0 = read_c0_entrylo0(); 58 entrylo1 = read_c0_entrylo1(); 59 60 /* Unused entries have a virtual address of CKSEG0. */ 61 if ((entryhi & ~0x1ffffUL) != CKSEG0 62 && (entryhi & 0xff) == asid) { 63 #ifdef CONFIG_32BIT 64 int width = 8; 65 #else 66 int width = 11; 67 #endif 68 /* 69 * Only print entries in use 70 */ 71 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask)); 72 73 c0 = (entrylo0 >> 3) & 7; 74 c1 = (entrylo1 >> 3) & 7; 75 76 printk("va=%0*lx asid=%02lx\n", 77 width, (entryhi & ~0x1fffUL), 78 entryhi & 0xff); 79 printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", 80 width, 81 (entrylo0 << 6) & PAGE_MASK, c0, 82 (entrylo0 & 4) ? 1 : 0, 83 (entrylo0 & 2) ? 1 : 0, 84 (entrylo0 & 1) ? 1 : 0); 85 printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n", 86 width, 87 (entrylo1 << 6) & PAGE_MASK, c1, 88 (entrylo1 & 4) ? 1 : 0, 89 (entrylo1 & 2) ? 1 : 0, 90 (entrylo1 & 1) ? 1 : 0); 91 } 92 } 93 printk("\n"); 94 95 write_c0_entryhi(s_entryhi); 96 write_c0_index(s_index); 97 } 98 99 void dump_tlb_all(void) 100 { 101 dump_tlb(0, current_cpu_data.tlbsize - 1); 102 } 103