xref: /linux/arch/mips/lantiq/falcon/reset.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * This program is free software; you can redistribute it and/or modify it
3  * under the terms of the GNU General Public License version 2 as published
4  * by the Free Software Foundation.
5  *
6  * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
7  * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
8  */
9 
10 #include <linux/init.h>
11 #include <linux/io.h>
12 #include <linux/pm.h>
13 #include <asm/reboot.h>
14 #include <linux/export.h>
15 
16 #include <lantiq_soc.h>
17 
18 /* CPU0 Reset Source Register */
19 #define SYS1_CPU0RS		0x0040
20 /* reset cause mask */
21 #define CPU0RS_MASK		0x0003
22 /* CPU0 Boot Mode Register */
23 #define SYS1_BM			0x00a0
24 /* boot mode mask */
25 #define BM_MASK			0x0005
26 
27 /* allow platform code to find out what surce we booted from */
28 unsigned char ltq_boot_select(void)
29 {
30 	return ltq_sys1_r32(SYS1_BM) & BM_MASK;
31 }
32 
33 /* allow the watchdog driver to find out what the boot reason was */
34 int ltq_reset_cause(void)
35 {
36 	return ltq_sys1_r32(SYS1_CPU0RS) & CPU0RS_MASK;
37 }
38 EXPORT_SYMBOL_GPL(ltq_reset_cause);
39 
40 #define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
41 #define BOOT_PW1_REG	(BOOT_REG_BASE | 0x20)
42 #define BOOT_PW2_REG	(BOOT_REG_BASE | 0x24)
43 #define BOOT_PW1	0x4C545100
44 #define BOOT_PW2	0x0051544C
45 
46 #define WDT_REG_BASE	(KSEG1 | 0x1F8803F0)
47 #define WDT_PW1		0x00BE0000
48 #define WDT_PW2		0x00DC0000
49 
50 static void machine_restart(char *command)
51 {
52 	local_irq_disable();
53 
54 	/* reboot magic */
55 	ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */
56 	ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */
57 	ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */
58 
59 	/* watchdog magic */
60 	ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);
61 	ltq_w32(WDT_PW2 |
62 		(0x3 << 26) | /* PWL */
63 		(0x2 << 24) | /* CLKDIV */
64 		(0x1 << 31) | /* enable */
65 		(1), /* reload */
66 		(void *)WDT_REG_BASE);
67 	unreachable();
68 }
69 
70 static void machine_halt(void)
71 {
72 	local_irq_disable();
73 	unreachable();
74 }
75 
76 static void machine_power_off(void)
77 {
78 	local_irq_disable();
79 	unreachable();
80 }
81 
82 static int __init mips_reboot_setup(void)
83 {
84 	_machine_restart = machine_restart;
85 	_machine_halt = machine_halt;
86 	pm_power_off = machine_power_off;
87 	return 0;
88 }
89 
90 arch_initcall(mips_reboot_setup);
91