1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <asm/asm-offsets.h> 3#include <asm/thread_info.h> 4 5#define PAGE_SIZE _PAGE_SIZE 6 7/* 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 9 * ensure that it has .bss alignment (64K). 10 */ 11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) 12 13/* Cavium Octeon should not have a separate PT_NOTE Program Header. */ 14#ifndef CONFIG_CAVIUM_OCTEON_SOC 15#define EMITS_PT_NOTE 16#endif 17 18#include <asm-generic/vmlinux.lds.h> 19 20#undef mips 21#define mips mips 22OUTPUT_ARCH(mips) 23ENTRY(kernel_entry) 24PHDRS { 25 text PT_LOAD FLAGS(7); /* RWX */ 26#ifndef CONFIG_CAVIUM_OCTEON_SOC 27 note PT_NOTE FLAGS(4); /* R__ */ 28#endif /* CAVIUM_OCTEON_SOC */ 29} 30 31#ifdef CONFIG_32BIT 32 #ifdef CONFIG_CPU_LITTLE_ENDIAN 33 jiffies = jiffies_64; 34 #else 35 jiffies = jiffies_64 + 4; 36 #endif 37#else 38 jiffies = jiffies_64; 39#endif 40 41SECTIONS 42{ 43#ifdef CONFIG_BOOT_ELF64 44 /* Read-only sections, merged into text segment: */ 45 /* . = 0xc000000000000000; */ 46 47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 48 /* . = 0xc00000000001c000; */ 49 50 /* Set the vaddr for the text segment to a value 51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured 52 * >= 0xa800 0000 0030 0000 otherwise 53 */ 54 55 /* . = 0xa800000000300000; */ 56 . = 0xffffffff80300000; 57#endif 58 . = LINKER_LOAD_ADDRESS; 59 /* read-only */ 60 _text = .; /* Text and read-only data */ 61 .text : { 62 TEXT_TEXT 63 SCHED_TEXT 64 LOCK_TEXT 65 KPROBES_TEXT 66 IRQENTRY_TEXT 67 SOFTIRQENTRY_TEXT 68 *(.fixup) 69 *(.gnu.warning) 70 . = ALIGN(16); 71 *(.got) /* Global offset table */ 72 } :text = 0 73 _etext = .; /* End of text section */ 74 75 EXCEPTION_TABLE(16) 76 77 /* Exception table for data bus errors */ 78 __dbe_table : { 79 __start___dbe_table = .; 80 KEEP(*(__dbe_table)) 81 __stop___dbe_table = .; 82 } 83 84 _sdata = .; /* Start of data section */ 85 RO_DATA(4096) 86 87 /* writeable */ 88 .data : { /* Data */ 89 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 90 91 INIT_TASK_DATA(THREAD_SIZE) 92 NOSAVE_DATA 93 PAGE_ALIGNED_DATA(PAGE_SIZE) 94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 95 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 96 DATA_DATA 97 CONSTRUCTORS 98 } 99 BUG_TABLE 100 _gp = . + 0x8000; 101 .lit8 : { 102 *(.lit8) 103 } 104 .lit4 : { 105 *(.lit4) 106 } 107 /* We want the small data sections together, so single-instruction offsets 108 can access them all, and initialized data all before uninitialized, so 109 we can shorten the on-disk segment size. */ 110 .sdata : { 111 *(.sdata) 112 } 113 _edata = .; /* End of data section */ 114 115 /* will be freed after init */ 116 . = ALIGN(PAGE_SIZE); /* Init code and data */ 117 __init_begin = .; 118 INIT_TEXT_SECTION(PAGE_SIZE) 119 INIT_DATA_SECTION(16) 120 121 . = ALIGN(4); 122 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 123 __mips_machines_start = .; 124 KEEP(*(.mips.machines.init)) 125 __mips_machines_end = .; 126 } 127 128 /* .exit.text is discarded at runtime, not link time, to deal with 129 * references from .rodata 130 */ 131 .exit.text : { 132 EXIT_TEXT 133 } 134 .exit.data : { 135 EXIT_DATA 136 } 137#ifdef CONFIG_SMP 138 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 139#endif 140 141 .rel.dyn : ALIGN(8) { 142 *(.rel) 143 *(.rel*) 144 } 145 146#ifdef CONFIG_MIPS_ELF_APPENDED_DTB 147 STRUCT_ALIGN(); 148 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { 149 *(.appended_dtb) 150 KEEP(*(.appended_dtb)) 151 } 152#endif 153 154#ifdef CONFIG_RELOCATABLE 155 . = ALIGN(4); 156 157 .data.reloc : { 158 _relocation_start = .; 159 /* 160 * Space for relocation table 161 * This needs to be filled so that the 162 * relocs tool can overwrite the content. 163 * An invalid value is left at the start of the 164 * section to abort relocation if the table 165 * has not been filled in. 166 */ 167 LONG(0xFFFFFFFF); 168 FILL(0); 169 . += CONFIG_RELOCATION_TABLE_SIZE - 4; 170 _relocation_end = .; 171 } 172#endif 173 174#ifdef CONFIG_MIPS_RAW_APPENDED_DTB 175 .fill : { 176 FILL(0); 177 BYTE(0); 178 STRUCT_ALIGN(); 179 } 180 __appended_dtb = .; 181 /* leave space for appended DTB */ 182 . += 0x100000; 183#endif 184 /* 185 * Align to 64K in attempt to eliminate holes before the 186 * .bss..swapper_pg_dir section at the start of .bss. This 187 * also satisfies PAGE_SIZE alignment as the largest page size 188 * allowed is 64K. 189 */ 190 . = ALIGN(0x10000); 191 __init_end = .; 192 /* freed after init ends here */ 193 194 /* 195 * Force .bss to 64K alignment so that .bss..swapper_pg_dir 196 * gets that alignment. .sbss should be empty, so there will be 197 * no holes after __init_end. */ 198 BSS_SECTION(0, 0x10000, 8) 199 200 _end = . ; 201 202 /* These mark the ABI of the kernel for debuggers. */ 203 .mdebug.abi32 : { 204 KEEP(*(.mdebug.abi32)) 205 } 206 .mdebug.abi64 : { 207 KEEP(*(.mdebug.abi64)) 208 } 209 210 /* This is the MIPS specific mdebug section. */ 211 .mdebug : { 212 *(.mdebug) 213 } 214 215 STABS_DEBUG 216 DWARF_DEBUG 217 ELF_DETAILS 218 219 /* These must appear regardless of . */ 220 .gptab.sdata : { 221 *(.gptab.data) 222 *(.gptab.sdata) 223 } 224 .gptab.sbss : { 225 *(.gptab.bss) 226 *(.gptab.sbss) 227 } 228 229 /* Sections to be discarded */ 230 DISCARDS 231 /DISCARD/ : { 232 /* ABI crap starts here */ 233 *(.MIPS.abiflags) 234 *(.MIPS.options) 235 *(.gnu.attributes) 236 *(.options) 237 *(.pdr) 238 *(.reginfo) 239 } 240} 241