xref: /linux/arch/mips/kernel/smp.c (revision 10cc3529072d5415fb040018a8a99aa7a60190b6)
1 /*
2  * This program is free software; you can redistribute it and/or
3  * modify it under the terms of the GNU General Public License
4  * as published by the Free Software Foundation; either version 2
5  * of the License, or (at your option) any later version.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * You should have received a copy of the GNU General Public License
13  * along with this program; if not, write to the Free Software
14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
15  *
16  * Copyright (C) 2000, 2001 Kanoj Sarcar
17  * Copyright (C) 2000, 2001 Ralf Baechle
18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
20  */
21 #include <linux/cache.h>
22 #include <linux/delay.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/spinlock.h>
26 #include <linux/threads.h>
27 #include <linux/module.h>
28 #include <linux/time.h>
29 #include <linux/timex.h>
30 #include <linux/sched.h>
31 #include <linux/cpumask.h>
32 #include <linux/cpu.h>
33 #include <linux/err.h>
34 
35 #include <asm/atomic.h>
36 #include <asm/cpu.h>
37 #include <asm/processor.h>
38 #include <asm/system.h>
39 #include <asm/mmu_context.h>
40 #include <asm/smp.h>
41 #include <asm/time.h>
42 
43 #ifdef CONFIG_MIPS_MT_SMTC
44 #include <asm/mipsmtregs.h>
45 #endif /* CONFIG_MIPS_MT_SMTC */
46 
47 cpumask_t phys_cpu_present_map;		/* Bitmask of available CPUs */
48 volatile cpumask_t cpu_callin_map;	/* Bitmask of started secondaries */
49 cpumask_t cpu_online_map;		/* Bitmask of currently online CPUs */
50 int __cpu_number_map[NR_CPUS];		/* Map physical to logical */
51 int __cpu_logical_map[NR_CPUS];		/* Map logical to physical */
52 
53 EXPORT_SYMBOL(phys_cpu_present_map);
54 EXPORT_SYMBOL(cpu_online_map);
55 
56 extern void __init calibrate_delay(void);
57 extern void cpu_idle(void);
58 
59 /*
60  * First C code run on the secondary CPUs after being started up by
61  * the master.
62  */
63 asmlinkage __cpuinit void start_secondary(void)
64 {
65 	unsigned int cpu;
66 
67 #ifdef CONFIG_MIPS_MT_SMTC
68 	/* Only do cpu_probe for first TC of CPU */
69 	if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
70 #endif /* CONFIG_MIPS_MT_SMTC */
71 	cpu_probe();
72 	cpu_report();
73 	per_cpu_trap_init();
74 	mips_clockevent_init();
75 	prom_init_secondary();
76 
77 	/*
78 	 * XXX parity protection should be folded in here when it's converted
79 	 * to an option instead of something based on .cputype
80 	 */
81 
82 	calibrate_delay();
83 	preempt_disable();
84 	cpu = smp_processor_id();
85 	cpu_data[cpu].udelay_val = loops_per_jiffy;
86 
87 	prom_smp_finish();
88 
89 	cpu_set(cpu, cpu_callin_map);
90 
91 	cpu_idle();
92 }
93 
94 DEFINE_SPINLOCK(smp_call_lock);
95 
96 struct call_data_struct *call_data;
97 
98 /*
99  * Run a function on all other CPUs.
100  *  <func>      The function to run. This must be fast and non-blocking.
101  *  <info>      An arbitrary pointer to pass to the function.
102  *  <retry>     If true, keep retrying until ready.
103  *  <wait>      If true, wait until function has completed on other CPUs.
104  *  [RETURNS]   0 on success, else a negative status code.
105  *
106  * Does not return until remote CPUs are nearly ready to execute <func>
107  * or are or have executed.
108  *
109  * You must not call this function with disabled interrupts or from a
110  * hardware interrupt handler or from a bottom half handler:
111  *
112  * CPU A                               CPU B
113  * Disable interrupts
114  *                                     smp_call_function()
115  *                                     Take call_lock
116  *                                     Send IPIs
117  *                                     Wait for all cpus to acknowledge IPI
118  *                                     CPU A has not responded, spin waiting
119  *                                     for cpu A to respond, holding call_lock
120  * smp_call_function()
121  * Spin waiting for call_lock
122  * Deadlock                            Deadlock
123  */
124 int smp_call_function (void (*func) (void *info), void *info, int retry,
125 								int wait)
126 {
127 	struct call_data_struct data;
128 	int i, cpus = num_online_cpus() - 1;
129 	int cpu = smp_processor_id();
130 
131 	/*
132 	 * Can die spectacularly if this CPU isn't yet marked online
133 	 */
134 	BUG_ON(!cpu_online(cpu));
135 
136 	if (!cpus)
137 		return 0;
138 
139 	/* Can deadlock when called with interrupts disabled */
140 	WARN_ON(irqs_disabled());
141 
142 	data.func = func;
143 	data.info = info;
144 	atomic_set(&data.started, 0);
145 	data.wait = wait;
146 	if (wait)
147 		atomic_set(&data.finished, 0);
148 
149 	spin_lock(&smp_call_lock);
150 	call_data = &data;
151 	smp_mb();
152 
153 	/* Send a message to all other CPUs and wait for them to respond */
154 	for_each_online_cpu(i)
155 		if (i != cpu)
156 			core_send_ipi(i, SMP_CALL_FUNCTION);
157 
158 	/* Wait for response */
159 	/* FIXME: lock-up detection, backtrace on lock-up */
160 	while (atomic_read(&data.started) != cpus)
161 		barrier();
162 
163 	if (wait)
164 		while (atomic_read(&data.finished) != cpus)
165 			barrier();
166 	call_data = NULL;
167 	spin_unlock(&smp_call_lock);
168 
169 	return 0;
170 }
171 
172 
173 void smp_call_function_interrupt(void)
174 {
175 	void (*func) (void *info) = call_data->func;
176 	void *info = call_data->info;
177 	int wait = call_data->wait;
178 
179 	/*
180 	 * Notify initiating CPU that I've grabbed the data and am
181 	 * about to execute the function.
182 	 */
183 	smp_mb();
184 	atomic_inc(&call_data->started);
185 
186 	/*
187 	 * At this point the info structure may be out of scope unless wait==1.
188 	 */
189 	irq_enter();
190 	(*func)(info);
191 	irq_exit();
192 
193 	if (wait) {
194 		smp_mb();
195 		atomic_inc(&call_data->finished);
196 	}
197 }
198 
199 int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
200 			     int retry, int wait)
201 {
202 	struct call_data_struct data;
203 	int me;
204 
205 	/*
206 	 * Can die spectacularly if this CPU isn't yet marked online
207 	 */
208 	if (!cpu_online(cpu))
209 		return 0;
210 
211 	me = get_cpu();
212 	BUG_ON(!cpu_online(me));
213 
214 	if (cpu == me) {
215 		local_irq_disable();
216 		func(info);
217 		local_irq_enable();
218 		put_cpu();
219 		return 0;
220 	}
221 
222 	/* Can deadlock when called with interrupts disabled */
223 	WARN_ON(irqs_disabled());
224 
225 	data.func = func;
226 	data.info = info;
227 	atomic_set(&data.started, 0);
228 	data.wait = wait;
229 	if (wait)
230 		atomic_set(&data.finished, 0);
231 
232 	spin_lock(&smp_call_lock);
233 	call_data = &data;
234 	smp_mb();
235 
236 	/* Send a message to the other CPU */
237 	core_send_ipi(cpu, SMP_CALL_FUNCTION);
238 
239 	/* Wait for response */
240 	/* FIXME: lock-up detection, backtrace on lock-up */
241 	while (atomic_read(&data.started) != 1)
242 		barrier();
243 
244 	if (wait)
245 		while (atomic_read(&data.finished) != 1)
246 			barrier();
247 	call_data = NULL;
248 	spin_unlock(&smp_call_lock);
249 
250 	put_cpu();
251 	return 0;
252 }
253 
254 static void stop_this_cpu(void *dummy)
255 {
256 	/*
257 	 * Remove this CPU:
258 	 */
259 	cpu_clear(smp_processor_id(), cpu_online_map);
260 	local_irq_enable();	/* May need to service _machine_restart IPI */
261 	for (;;);		/* Wait if available. */
262 }
263 
264 void smp_send_stop(void)
265 {
266 	smp_call_function(stop_this_cpu, NULL, 1, 0);
267 }
268 
269 void __init smp_cpus_done(unsigned int max_cpus)
270 {
271 	prom_cpus_done();
272 }
273 
274 /* called from main before smp_init() */
275 void __init smp_prepare_cpus(unsigned int max_cpus)
276 {
277 	init_new_context(current, &init_mm);
278 	current_thread_info()->cpu = 0;
279 	plat_prepare_cpus(max_cpus);
280 #ifndef CONFIG_HOTPLUG_CPU
281 	cpu_present_map = cpu_possible_map;
282 #endif
283 }
284 
285 /* preload SMP state for boot cpu */
286 void __devinit smp_prepare_boot_cpu(void)
287 {
288 	/*
289 	 * This assumes that bootup is always handled by the processor
290 	 * with the logic and physical number 0.
291 	 */
292 	__cpu_number_map[0] = 0;
293 	__cpu_logical_map[0] = 0;
294 	cpu_set(0, phys_cpu_present_map);
295 	cpu_set(0, cpu_online_map);
296 	cpu_set(0, cpu_callin_map);
297 }
298 
299 /*
300  * Called once for each "cpu_possible(cpu)".  Needs to spin up the cpu
301  * and keep control until "cpu_online(cpu)" is set.  Note: cpu is
302  * physical, not logical.
303  */
304 int __cpuinit __cpu_up(unsigned int cpu)
305 {
306 	struct task_struct *idle;
307 
308 	/*
309 	 * Processor goes to start_secondary(), sets online flag
310 	 * The following code is purely to make sure
311 	 * Linux can schedule processes on this slave.
312 	 */
313 	idle = fork_idle(cpu);
314 	if (IS_ERR(idle))
315 		panic(KERN_ERR "Fork failed for CPU %d", cpu);
316 
317 	prom_boot_secondary(cpu, idle);
318 
319 	/*
320 	 * Trust is futile.  We should really have timeouts ...
321 	 */
322 	while (!cpu_isset(cpu, cpu_callin_map))
323 		udelay(100);
324 
325 	cpu_set(cpu, cpu_online_map);
326 
327 	return 0;
328 }
329 
330 /* Not really SMP stuff ... */
331 int setup_profiling_timer(unsigned int multiplier)
332 {
333 	return 0;
334 }
335 
336 static void flush_tlb_all_ipi(void *info)
337 {
338 	local_flush_tlb_all();
339 }
340 
341 void flush_tlb_all(void)
342 {
343 	on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
344 }
345 
346 static void flush_tlb_mm_ipi(void *mm)
347 {
348 	local_flush_tlb_mm((struct mm_struct *)mm);
349 }
350 
351 /*
352  * Special Variant of smp_call_function for use by TLB functions:
353  *
354  *  o No return value
355  *  o collapses to normal function call on UP kernels
356  *  o collapses to normal function call on systems with a single shared
357  *    primary cache.
358  *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
359  */
360 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
361 {
362 #ifndef CONFIG_MIPS_MT_SMTC
363 	smp_call_function(func, info, 1, 1);
364 #endif
365 }
366 
367 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
368 {
369 	preempt_disable();
370 
371 	smp_on_other_tlbs(func, info);
372 	func(info);
373 
374 	preempt_enable();
375 }
376 
377 /*
378  * The following tlb flush calls are invoked when old translations are
379  * being torn down, or pte attributes are changing. For single threaded
380  * address spaces, a new context is obtained on the current cpu, and tlb
381  * context on other cpus are invalidated to force a new context allocation
382  * at switch_mm time, should the mm ever be used on other cpus. For
383  * multithreaded address spaces, intercpu interrupts have to be sent.
384  * Another case where intercpu interrupts are required is when the target
385  * mm might be active on another cpu (eg debuggers doing the flushes on
386  * behalf of debugees, kswapd stealing pages from another process etc).
387  * Kanoj 07/00.
388  */
389 
390 void flush_tlb_mm(struct mm_struct *mm)
391 {
392 	preempt_disable();
393 
394 	if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
395 		smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm);
396 	} else {
397 		int i;
398 		for (i = 0; i < num_online_cpus(); i++)
399 			if (smp_processor_id() != i)
400 				cpu_context(i, mm) = 0;
401 	}
402 	local_flush_tlb_mm(mm);
403 
404 	preempt_enable();
405 }
406 
407 struct flush_tlb_data {
408 	struct vm_area_struct *vma;
409 	unsigned long addr1;
410 	unsigned long addr2;
411 };
412 
413 static void flush_tlb_range_ipi(void *info)
414 {
415 	struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
416 
417 	local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
418 }
419 
420 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
421 {
422 	struct mm_struct *mm = vma->vm_mm;
423 
424 	preempt_disable();
425 	if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
426 		struct flush_tlb_data fd;
427 
428 		fd.vma = vma;
429 		fd.addr1 = start;
430 		fd.addr2 = end;
431 		smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd);
432 	} else {
433 		int i;
434 		for (i = 0; i < num_online_cpus(); i++)
435 			if (smp_processor_id() != i)
436 				cpu_context(i, mm) = 0;
437 	}
438 	local_flush_tlb_range(vma, start, end);
439 	preempt_enable();
440 }
441 
442 static void flush_tlb_kernel_range_ipi(void *info)
443 {
444 	struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
445 
446 	local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
447 }
448 
449 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
450 {
451 	struct flush_tlb_data fd;
452 
453 	fd.addr1 = start;
454 	fd.addr2 = end;
455 	on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
456 }
457 
458 static void flush_tlb_page_ipi(void *info)
459 {
460 	struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
461 
462 	local_flush_tlb_page(fd->vma, fd->addr1);
463 }
464 
465 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
466 {
467 	preempt_disable();
468 	if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
469 		struct flush_tlb_data fd;
470 
471 		fd.vma = vma;
472 		fd.addr1 = page;
473 		smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd);
474 	} else {
475 		int i;
476 		for (i = 0; i < num_online_cpus(); i++)
477 			if (smp_processor_id() != i)
478 				cpu_context(i, vma->vm_mm) = 0;
479 	}
480 	local_flush_tlb_page(vma, page);
481 	preempt_enable();
482 }
483 
484 static void flush_tlb_one_ipi(void *info)
485 {
486 	unsigned long vaddr = (unsigned long) info;
487 
488 	local_flush_tlb_one(vaddr);
489 }
490 
491 void flush_tlb_one(unsigned long vaddr)
492 {
493 	smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
494 }
495 
496 EXPORT_SYMBOL(flush_tlb_page);
497 EXPORT_SYMBOL(flush_tlb_one);
498