xref: /linux/arch/mips/kernel/ptrace.c (revision c537b994505099b7197e7d3125b942ecbcc51eb6) 
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/compiler.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/mm.h>
21 #include <linux/errno.h>
22 #include <linux/ptrace.h>
23 #include <linux/audit.h>
24 #include <linux/smp.h>
25 #include <linux/smp_lock.h>
26 #include <linux/user.h>
27 #include <linux/security.h>
28 #include <linux/signal.h>
29 
30 #include <asm/byteorder.h>
31 #include <asm/cpu.h>
32 #include <asm/dsp.h>
33 #include <asm/fpu.h>
34 #include <asm/mipsregs.h>
35 #include <asm/mipsmtregs.h>
36 #include <asm/pgtable.h>
37 #include <asm/page.h>
38 #include <asm/system.h>
39 #include <asm/uaccess.h>
40 #include <asm/bootinfo.h>
41 #include <asm/reg.h>
42 
43 /*
44  * Called by kernel/ptrace.c when detaching..
45  *
46  * Make sure single step bits etc are not set.
47  */
48 void ptrace_disable(struct task_struct *child)
49 {
50 	/* Nothing to do.. */
51 }
52 
53 /*
54  * Read a general register set.  We always use the 64-bit format, even
55  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
56  * Registers are sign extended to fill the available space.
57  */
58 int ptrace_getregs (struct task_struct *child, __s64 __user *data)
59 {
60 	struct pt_regs *regs;
61 	int i;
62 
63 	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
64 		return -EIO;
65 
66 	regs = task_pt_regs(child);
67 
68 	for (i = 0; i < 32; i++)
69 		__put_user (regs->regs[i], data + i);
70 	__put_user (regs->lo, data + EF_LO - EF_R0);
71 	__put_user (regs->hi, data + EF_HI - EF_R0);
72 	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
73 	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
74 	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
75 	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
76 
77 	return 0;
78 }
79 
80 /*
81  * Write a general register set.  As for PTRACE_GETREGS, we always use
82  * the 64-bit format.  On a 32-bit kernel only the lower order half
83  * (according to endianness) will be used.
84  */
85 int ptrace_setregs (struct task_struct *child, __s64 __user *data)
86 {
87 	struct pt_regs *regs;
88 	int i;
89 
90 	if (!access_ok(VERIFY_READ, data, 38 * 8))
91 		return -EIO;
92 
93 	regs = task_pt_regs(child);
94 
95 	for (i = 0; i < 32; i++)
96 		__get_user (regs->regs[i], data + i);
97 	__get_user (regs->lo, data + EF_LO - EF_R0);
98 	__get_user (regs->hi, data + EF_HI - EF_R0);
99 	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
100 
101 	/* badvaddr, status, and cause may not be written.  */
102 
103 	return 0;
104 }
105 
106 int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
107 {
108 	int i;
109 	unsigned int tmp;
110 
111 	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
112 		return -EIO;
113 
114 	if (tsk_used_math(child)) {
115 		fpureg_t *fregs = get_fpu_regs(child);
116 		for (i = 0; i < 32; i++)
117 			__put_user (fregs[i], i + (__u64 __user *) data);
118 	} else {
119 		for (i = 0; i < 32; i++)
120 			__put_user ((__u64) -1, i + (__u64 __user *) data);
121 	}
122 
123 	__put_user (child->thread.fpu.fcr31, data + 64);
124 
125 	preempt_disable();
126 	if (cpu_has_fpu) {
127 		unsigned int flags;
128 
129 		if (cpu_has_mipsmt) {
130 			unsigned int vpflags = dvpe();
131 			flags = read_c0_status();
132 			__enable_fpu();
133 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
134 			write_c0_status(flags);
135 			evpe(vpflags);
136 		} else {
137 			flags = read_c0_status();
138 			__enable_fpu();
139 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
140 			write_c0_status(flags);
141 		}
142 	} else {
143 		tmp = 0;
144 	}
145 	preempt_enable();
146 	__put_user (tmp, data + 65);
147 
148 	return 0;
149 }
150 
151 int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
152 {
153 	fpureg_t *fregs;
154 	int i;
155 
156 	if (!access_ok(VERIFY_READ, data, 33 * 8))
157 		return -EIO;
158 
159 	fregs = get_fpu_regs(child);
160 
161 	for (i = 0; i < 32; i++)
162 		__get_user (fregs[i], i + (__u64 __user *) data);
163 
164 	__get_user (child->thread.fpu.fcr31, data + 64);
165 
166 	/* FIR may not be written.  */
167 
168 	return 0;
169 }
170 
171 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
172 {
173 	int ret;
174 
175 	switch (request) {
176 	/* when I and D space are separate, these will need to be fixed. */
177 	case PTRACE_PEEKTEXT: /* read word at location addr. */
178 	case PTRACE_PEEKDATA: {
179 		unsigned long tmp;
180 		int copied;
181 
182 		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
183 		ret = -EIO;
184 		if (copied != sizeof(tmp))
185 			break;
186 		ret = put_user(tmp,(unsigned long __user *) data);
187 		break;
188 	}
189 
190 	/* Read the word at location addr in the USER area. */
191 	case PTRACE_PEEKUSR: {
192 		struct pt_regs *regs;
193 		unsigned long tmp = 0;
194 
195 		regs = task_pt_regs(child);
196 		ret = 0;  /* Default return value. */
197 
198 		switch (addr) {
199 		case 0 ... 31:
200 			tmp = regs->regs[addr];
201 			break;
202 		case FPR_BASE ... FPR_BASE + 31:
203 			if (tsk_used_math(child)) {
204 				fpureg_t *fregs = get_fpu_regs(child);
205 
206 #ifdef CONFIG_32BIT
207 				/*
208 				 * The odd registers are actually the high
209 				 * order bits of the values stored in the even
210 				 * registers - unless we're using r2k_switch.S.
211 				 */
212 				if (addr & 1)
213 					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
214 				else
215 					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
216 #endif
217 #ifdef CONFIG_64BIT
218 				tmp = fregs[addr - FPR_BASE];
219 #endif
220 			} else {
221 				tmp = -1;	/* FP not yet used  */
222 			}
223 			break;
224 		case PC:
225 			tmp = regs->cp0_epc;
226 			break;
227 		case CAUSE:
228 			tmp = regs->cp0_cause;
229 			break;
230 		case BADVADDR:
231 			tmp = regs->cp0_badvaddr;
232 			break;
233 		case MMHI:
234 			tmp = regs->hi;
235 			break;
236 		case MMLO:
237 			tmp = regs->lo;
238 			break;
239 #ifdef CONFIG_CPU_HAS_SMARTMIPS
240 		case ACX:
241 			tmp = regs->acx;
242 			break;
243 #endif
244 		case FPC_CSR:
245 			tmp = child->thread.fpu.fcr31;
246 			break;
247 		case FPC_EIR: {	/* implementation / version register */
248 			unsigned int flags;
249 #ifdef CONFIG_MIPS_MT_SMTC
250 			unsigned int irqflags;
251 			unsigned int mtflags;
252 #endif /* CONFIG_MIPS_MT_SMTC */
253 
254 			preempt_disable();
255 			if (!cpu_has_fpu) {
256 				preempt_enable();
257 				break;
258 			}
259 
260 #ifdef CONFIG_MIPS_MT_SMTC
261 			/* Read-modify-write of Status must be atomic */
262 			local_irq_save(irqflags);
263 			mtflags = dmt();
264 #endif /* CONFIG_MIPS_MT_SMTC */
265 			if (cpu_has_mipsmt) {
266 				unsigned int vpflags = dvpe();
267 				flags = read_c0_status();
268 				__enable_fpu();
269 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
270 				write_c0_status(flags);
271 				evpe(vpflags);
272 			} else {
273 				flags = read_c0_status();
274 				__enable_fpu();
275 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
276 				write_c0_status(flags);
277 			}
278 #ifdef CONFIG_MIPS_MT_SMTC
279 			emt(mtflags);
280 			local_irq_restore(irqflags);
281 #endif /* CONFIG_MIPS_MT_SMTC */
282 			preempt_enable();
283 			break;
284 		}
285 		case DSP_BASE ... DSP_BASE + 5: {
286 			dspreg_t *dregs;
287 
288 			if (!cpu_has_dsp) {
289 				tmp = 0;
290 				ret = -EIO;
291 				goto out;
292 			}
293 			dregs = __get_dsp_regs(child);
294 			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
295 			break;
296 		}
297 		case DSP_CONTROL:
298 			if (!cpu_has_dsp) {
299 				tmp = 0;
300 				ret = -EIO;
301 				goto out;
302 			}
303 			tmp = child->thread.dsp.dspcontrol;
304 			break;
305 		default:
306 			tmp = 0;
307 			ret = -EIO;
308 			goto out;
309 		}
310 		ret = put_user(tmp, (unsigned long __user *) data);
311 		break;
312 	}
313 
314 	/* when I and D space are separate, this will have to be fixed. */
315 	case PTRACE_POKETEXT: /* write the word at location addr. */
316 	case PTRACE_POKEDATA:
317 		ret = 0;
318 		if (access_process_vm(child, addr, &data, sizeof(data), 1)
319 		    == sizeof(data))
320 			break;
321 		ret = -EIO;
322 		break;
323 
324 	case PTRACE_POKEUSR: {
325 		struct pt_regs *regs;
326 		ret = 0;
327 		regs = task_pt_regs(child);
328 
329 		switch (addr) {
330 		case 0 ... 31:
331 			regs->regs[addr] = data;
332 			break;
333 		case FPR_BASE ... FPR_BASE + 31: {
334 			fpureg_t *fregs = get_fpu_regs(child);
335 
336 			if (!tsk_used_math(child)) {
337 				/* FP not yet used  */
338 				memset(&child->thread.fpu, ~0,
339 				       sizeof(child->thread.fpu));
340 				child->thread.fpu.fcr31 = 0;
341 			}
342 #ifdef CONFIG_32BIT
343 			/*
344 			 * The odd registers are actually the high order bits
345 			 * of the values stored in the even registers - unless
346 			 * we're using r2k_switch.S.
347 			 */
348 			if (addr & 1) {
349 				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
350 				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
351 			} else {
352 				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
353 				fregs[addr - FPR_BASE] |= data;
354 			}
355 #endif
356 #ifdef CONFIG_64BIT
357 			fregs[addr - FPR_BASE] = data;
358 #endif
359 			break;
360 		}
361 		case PC:
362 			regs->cp0_epc = data;
363 			break;
364 		case MMHI:
365 			regs->hi = data;
366 			break;
367 		case MMLO:
368 			regs->lo = data;
369 			break;
370 #ifdef CONFIG_CPU_HAS_SMARTMIPS
371 		case ACX:
372 			regs->acx = data;
373 			break;
374 #endif
375 		case FPC_CSR:
376 			child->thread.fpu.fcr31 = data;
377 			break;
378 		case DSP_BASE ... DSP_BASE + 5: {
379 			dspreg_t *dregs;
380 
381 			if (!cpu_has_dsp) {
382 				ret = -EIO;
383 				break;
384 			}
385 
386 			dregs = __get_dsp_regs(child);
387 			dregs[addr - DSP_BASE] = data;
388 			break;
389 		}
390 		case DSP_CONTROL:
391 			if (!cpu_has_dsp) {
392 				ret = -EIO;
393 				break;
394 			}
395 			child->thread.dsp.dspcontrol = data;
396 			break;
397 		default:
398 			/* The rest are not allowed. */
399 			ret = -EIO;
400 			break;
401 		}
402 		break;
403 		}
404 
405 	case PTRACE_GETREGS:
406 		ret = ptrace_getregs (child, (__u64 __user *) data);
407 		break;
408 
409 	case PTRACE_SETREGS:
410 		ret = ptrace_setregs (child, (__u64 __user *) data);
411 		break;
412 
413 	case PTRACE_GETFPREGS:
414 		ret = ptrace_getfpregs (child, (__u32 __user *) data);
415 		break;
416 
417 	case PTRACE_SETFPREGS:
418 		ret = ptrace_setfpregs (child, (__u32 __user *) data);
419 		break;
420 
421 	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
422 	case PTRACE_CONT: { /* restart after signal. */
423 		ret = -EIO;
424 		if (!valid_signal(data))
425 			break;
426 		if (request == PTRACE_SYSCALL) {
427 			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
428 		}
429 		else {
430 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
431 		}
432 		child->exit_code = data;
433 		wake_up_process(child);
434 		ret = 0;
435 		break;
436 	}
437 
438 	/*
439 	 * make the child exit.  Best I can do is send it a sigkill.
440 	 * perhaps it should be put in the status that it wants to
441 	 * exit.
442 	 */
443 	case PTRACE_KILL:
444 		ret = 0;
445 		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
446 			break;
447 		child->exit_code = SIGKILL;
448 		wake_up_process(child);
449 		break;
450 
451 	case PTRACE_DETACH: /* detach a process that was attached. */
452 		ret = ptrace_detach(child, data);
453 		break;
454 
455 	case PTRACE_GET_THREAD_AREA:
456 		ret = put_user(task_thread_info(child)->tp_value,
457 				(unsigned long __user *) data);
458 		break;
459 
460 	default:
461 		ret = ptrace_request(child, request, addr, data);
462 		break;
463 	}
464  out:
465 	return ret;
466 }
467 
468 static inline int audit_arch(void)
469 {
470 	int arch = EM_MIPS;
471 #ifdef CONFIG_64BIT
472 	arch |=  __AUDIT_ARCH_64BIT;
473 #endif
474 #if defined(__LITTLE_ENDIAN)
475 	arch |=  __AUDIT_ARCH_LE;
476 #endif
477 	return arch;
478 }
479 
480 /*
481  * Notification of system call entry/exit
482  * - triggered by current->work.syscall_trace
483  */
484 asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
485 {
486 	if (unlikely(current->audit_context) && entryexit)
487 		audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
488 		                   regs->regs[2]);
489 
490 	if (!(current->ptrace & PT_PTRACED))
491 		goto out;
492 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
493 		goto out;
494 
495 	/* The 0x80 provides a way for the tracing parent to distinguish
496 	   between a syscall stop and SIGTRAP delivery */
497 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
498 	                         0x80 : 0));
499 
500 	/*
501 	 * this isn't the same as continuing with a signal, but it will do
502 	 * for normal use.  strace only continues with a signal if the
503 	 * stopping signal is not SIGTRAP.  -brl
504 	 */
505 	if (current->exit_code) {
506 		send_sig(current->exit_code, current, 1);
507 		current->exit_code = 0;
508 	}
509  out:
510 	if (unlikely(current->audit_context) && !entryexit)
511 		audit_syscall_entry(audit_arch(), regs->regs[2],
512 				    regs->regs[4], regs->regs[5],
513 				    regs->regs[6], regs->regs[7]);
514 }
515