xref: /linux/arch/mips/kernel/ptrace.c (revision 9ce7677cfd7cd871adb457c80bea3b581b839641)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/config.h>
18 #include <linux/compiler.h>
19 #include <linux/kernel.h>
20 #include <linux/sched.h>
21 #include <linux/mm.h>
22 #include <linux/errno.h>
23 #include <linux/ptrace.h>
24 #include <linux/audit.h>
25 #include <linux/smp.h>
26 #include <linux/smp_lock.h>
27 #include <linux/user.h>
28 #include <linux/security.h>
29 #include <linux/signal.h>
30 
31 #include <asm/byteorder.h>
32 #include <asm/cpu.h>
33 #include <asm/dsp.h>
34 #include <asm/fpu.h>
35 #include <asm/mipsregs.h>
36 #include <asm/mipsmtregs.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <asm/system.h>
40 #include <asm/uaccess.h>
41 #include <asm/bootinfo.h>
42 #include <asm/reg.h>
43 
44 /*
45  * Called by kernel/ptrace.c when detaching..
46  *
47  * Make sure single step bits etc are not set.
48  */
49 void ptrace_disable(struct task_struct *child)
50 {
51 	/* Nothing to do.. */
52 }
53 
54 /*
55  * Read a general register set.  We always use the 64-bit format, even
56  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
57  * Registers are sign extended to fill the available space.
58  */
59 int ptrace_getregs (struct task_struct *child, __s64 __user *data)
60 {
61 	struct pt_regs *regs;
62 	int i;
63 
64 	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
65 		return -EIO;
66 
67 	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
68 	       THREAD_SIZE - 32 - sizeof(struct pt_regs));
69 
70 	for (i = 0; i < 32; i++)
71 		__put_user (regs->regs[i], data + i);
72 	__put_user (regs->lo, data + EF_LO - EF_R0);
73 	__put_user (regs->hi, data + EF_HI - EF_R0);
74 	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
75 	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
76 	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
77 	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
78 
79 	return 0;
80 }
81 
82 /*
83  * Write a general register set.  As for PTRACE_GETREGS, we always use
84  * the 64-bit format.  On a 32-bit kernel only the lower order half
85  * (according to endianness) will be used.
86  */
87 int ptrace_setregs (struct task_struct *child, __s64 __user *data)
88 {
89 	struct pt_regs *regs;
90 	int i;
91 
92 	if (!access_ok(VERIFY_READ, data, 38 * 8))
93 		return -EIO;
94 
95 	regs = (struct pt_regs *) ((unsigned long) child->thread_info +
96 	       THREAD_SIZE - 32 - sizeof(struct pt_regs));
97 
98 	for (i = 0; i < 32; i++)
99 		__get_user (regs->regs[i], data + i);
100 	__get_user (regs->lo, data + EF_LO - EF_R0);
101 	__get_user (regs->hi, data + EF_HI - EF_R0);
102 	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
103 
104 	/* badvaddr, status, and cause may not be written.  */
105 
106 	return 0;
107 }
108 
109 int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
110 {
111 	int i;
112 
113 	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
114 		return -EIO;
115 
116 	if (tsk_used_math(child)) {
117 		fpureg_t *fregs = get_fpu_regs(child);
118 		for (i = 0; i < 32; i++)
119 			__put_user (fregs[i], i + (__u64 __user *) data);
120 	} else {
121 		for (i = 0; i < 32; i++)
122 			__put_user ((__u64) -1, i + (__u64 __user *) data);
123 	}
124 
125 	if (cpu_has_fpu) {
126 		unsigned int flags, tmp;
127 
128 		__put_user (child->thread.fpu.hard.fcr31, data + 64);
129 
130 		preempt_disable();
131 		if (cpu_has_mipsmt) {
132 			unsigned int vpflags = dvpe();
133 			flags = read_c0_status();
134 			__enable_fpu();
135 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
136 			write_c0_status(flags);
137 			evpe(vpflags);
138 		} else {
139 			flags = read_c0_status();
140 			__enable_fpu();
141 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
142 			write_c0_status(flags);
143 		}
144 		preempt_enable();
145 		__put_user (tmp, data + 65);
146 	} else {
147 		__put_user (child->thread.fpu.soft.fcr31, data + 64);
148 		__put_user ((__u32) 0, data + 65);
149 	}
150 
151 	return 0;
152 }
153 
154 int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
155 {
156 	fpureg_t *fregs;
157 	int i;
158 
159 	if (!access_ok(VERIFY_READ, data, 33 * 8))
160 		return -EIO;
161 
162 	fregs = get_fpu_regs(child);
163 
164 	for (i = 0; i < 32; i++)
165 		__get_user (fregs[i], i + (__u64 __user *) data);
166 
167 	if (cpu_has_fpu)
168 		__get_user (child->thread.fpu.hard.fcr31, data + 64);
169 	else
170 		__get_user (child->thread.fpu.soft.fcr31, data + 64);
171 
172 	/* FIR may not be written.  */
173 
174 	return 0;
175 }
176 
177 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
178 {
179 	int ret;
180 
181 	switch (request) {
182 	/* when I and D space are separate, these will need to be fixed. */
183 	case PTRACE_PEEKTEXT: /* read word at location addr. */
184 	case PTRACE_PEEKDATA: {
185 		unsigned long tmp;
186 		int copied;
187 
188 		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
189 		ret = -EIO;
190 		if (copied != sizeof(tmp))
191 			break;
192 		ret = put_user(tmp,(unsigned long __user *) data);
193 		break;
194 	}
195 
196 	/* Read the word at location addr in the USER area. */
197 	case PTRACE_PEEKUSR: {
198 		struct pt_regs *regs;
199 		unsigned long tmp = 0;
200 
201 		regs = (struct pt_regs *) ((unsigned long) child->thread_info +
202 		       THREAD_SIZE - 32 - sizeof(struct pt_regs));
203 		ret = 0;  /* Default return value. */
204 
205 		switch (addr) {
206 		case 0 ... 31:
207 			tmp = regs->regs[addr];
208 			break;
209 		case FPR_BASE ... FPR_BASE + 31:
210 			if (tsk_used_math(child)) {
211 				fpureg_t *fregs = get_fpu_regs(child);
212 
213 #ifdef CONFIG_32BIT
214 				/*
215 				 * The odd registers are actually the high
216 				 * order bits of the values stored in the even
217 				 * registers - unless we're using r2k_switch.S.
218 				 */
219 				if (addr & 1)
220 					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
221 				else
222 					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
223 #endif
224 #ifdef CONFIG_64BIT
225 				tmp = fregs[addr - FPR_BASE];
226 #endif
227 			} else {
228 				tmp = -1;	/* FP not yet used  */
229 			}
230 			break;
231 		case PC:
232 			tmp = regs->cp0_epc;
233 			break;
234 		case CAUSE:
235 			tmp = regs->cp0_cause;
236 			break;
237 		case BADVADDR:
238 			tmp = regs->cp0_badvaddr;
239 			break;
240 		case MMHI:
241 			tmp = regs->hi;
242 			break;
243 		case MMLO:
244 			tmp = regs->lo;
245 			break;
246 		case FPC_CSR:
247 			if (cpu_has_fpu)
248 				tmp = child->thread.fpu.hard.fcr31;
249 			else
250 				tmp = child->thread.fpu.soft.fcr31;
251 			break;
252 		case FPC_EIR: {	/* implementation / version register */
253 			unsigned int flags;
254 
255 			if (!cpu_has_fpu)
256 				break;
257 
258 			preempt_disable();
259 			if (cpu_has_mipsmt) {
260 				unsigned int vpflags = dvpe();
261 				flags = read_c0_status();
262 				__enable_fpu();
263 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
264 				write_c0_status(flags);
265 				evpe(vpflags);
266 			} else {
267 				flags = read_c0_status();
268 				__enable_fpu();
269 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
270 				write_c0_status(flags);
271 			}
272 			preempt_enable();
273 			break;
274 		}
275 		case DSP_BASE ... DSP_BASE + 5: {
276 			dspreg_t *dregs;
277 
278 			if (!cpu_has_dsp) {
279 				tmp = 0;
280 				ret = -EIO;
281 				goto out;
282 			}
283 			if (child->thread.dsp.used_dsp) {
284 				dregs = __get_dsp_regs(child);
285 				tmp = (unsigned long) (dregs[addr - DSP_BASE]);
286 			} else {
287 				tmp = -1;	/* DSP registers yet used  */
288 			}
289 			break;
290 		}
291 		case DSP_CONTROL:
292 			if (!cpu_has_dsp) {
293 				tmp = 0;
294 				ret = -EIO;
295 				goto out;
296 			}
297 			tmp = child->thread.dsp.dspcontrol;
298 			break;
299 		default:
300 			tmp = 0;
301 			ret = -EIO;
302 			goto out;
303 		}
304 		ret = put_user(tmp, (unsigned long __user *) data);
305 		break;
306 	}
307 
308 	/* when I and D space are separate, this will have to be fixed. */
309 	case PTRACE_POKETEXT: /* write the word at location addr. */
310 	case PTRACE_POKEDATA:
311 		ret = 0;
312 		if (access_process_vm(child, addr, &data, sizeof(data), 1)
313 		    == sizeof(data))
314 			break;
315 		ret = -EIO;
316 		break;
317 
318 	case PTRACE_POKEUSR: {
319 		struct pt_regs *regs;
320 		ret = 0;
321 		regs = (struct pt_regs *) ((unsigned long) child->thread_info +
322 		       THREAD_SIZE - 32 - sizeof(struct pt_regs));
323 
324 		switch (addr) {
325 		case 0 ... 31:
326 			regs->regs[addr] = data;
327 			break;
328 		case FPR_BASE ... FPR_BASE + 31: {
329 			fpureg_t *fregs = get_fpu_regs(child);
330 
331 			if (!tsk_used_math(child)) {
332 				/* FP not yet used  */
333 				memset(&child->thread.fpu.hard, ~0,
334 				       sizeof(child->thread.fpu.hard));
335 				child->thread.fpu.hard.fcr31 = 0;
336 			}
337 #ifdef CONFIG_32BIT
338 			/*
339 			 * The odd registers are actually the high order bits
340 			 * of the values stored in the even registers - unless
341 			 * we're using r2k_switch.S.
342 			 */
343 			if (addr & 1) {
344 				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
345 				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
346 			} else {
347 				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
348 				fregs[addr - FPR_BASE] |= data;
349 			}
350 #endif
351 #ifdef CONFIG_64BIT
352 			fregs[addr - FPR_BASE] = data;
353 #endif
354 			break;
355 		}
356 		case PC:
357 			regs->cp0_epc = data;
358 			break;
359 		case MMHI:
360 			regs->hi = data;
361 			break;
362 		case MMLO:
363 			regs->lo = data;
364 			break;
365 		case FPC_CSR:
366 			if (cpu_has_fpu)
367 				child->thread.fpu.hard.fcr31 = data;
368 			else
369 				child->thread.fpu.soft.fcr31 = data;
370 			break;
371 		case DSP_BASE ... DSP_BASE + 5: {
372 			dspreg_t *dregs;
373 
374 			if (!cpu_has_dsp) {
375 				ret = -EIO;
376 				break;
377 			}
378 
379 			dregs = __get_dsp_regs(child);
380 			dregs[addr - DSP_BASE] = data;
381 			break;
382 		}
383 		case DSP_CONTROL:
384 			if (!cpu_has_dsp) {
385 				ret = -EIO;
386 				break;
387 			}
388 			child->thread.dsp.dspcontrol = data;
389 			break;
390 		default:
391 			/* The rest are not allowed. */
392 			ret = -EIO;
393 			break;
394 		}
395 		break;
396 		}
397 
398 	case PTRACE_GETREGS:
399 		ret = ptrace_getregs (child, (__u64 __user *) data);
400 		break;
401 
402 	case PTRACE_SETREGS:
403 		ret = ptrace_setregs (child, (__u64 __user *) data);
404 		break;
405 
406 	case PTRACE_GETFPREGS:
407 		ret = ptrace_getfpregs (child, (__u32 __user *) data);
408 		break;
409 
410 	case PTRACE_SETFPREGS:
411 		ret = ptrace_setfpregs (child, (__u32 __user *) data);
412 		break;
413 
414 	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
415 	case PTRACE_CONT: { /* restart after signal. */
416 		ret = -EIO;
417 		if (!valid_signal(data))
418 			break;
419 		if (request == PTRACE_SYSCALL) {
420 			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
421 		}
422 		else {
423 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
424 		}
425 		child->exit_code = data;
426 		wake_up_process(child);
427 		ret = 0;
428 		break;
429 	}
430 
431 	/*
432 	 * make the child exit.  Best I can do is send it a sigkill.
433 	 * perhaps it should be put in the status that it wants to
434 	 * exit.
435 	 */
436 	case PTRACE_KILL:
437 		ret = 0;
438 		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
439 			break;
440 		child->exit_code = SIGKILL;
441 		wake_up_process(child);
442 		break;
443 
444 	case PTRACE_DETACH: /* detach a process that was attached. */
445 		ret = ptrace_detach(child, data);
446 		break;
447 
448 	case PTRACE_GET_THREAD_AREA:
449 		ret = put_user(child->thread_info->tp_value,
450 				(unsigned long __user *) data);
451 		break;
452 
453 	default:
454 		ret = ptrace_request(child, request, addr, data);
455 		break;
456 	}
457  out:
458 	return ret;
459 }
460 
461 static inline int audit_arch(void)
462 {
463 	int arch = EM_MIPS;
464 #ifdef CONFIG_64BIT
465 	arch |=  __AUDIT_ARCH_64BIT;
466 #endif
467 #if defined(__LITTLE_ENDIAN)
468 	arch |=  __AUDIT_ARCH_LE;
469 #endif
470 	return arch;
471 }
472 
473 /*
474  * Notification of system call entry/exit
475  * - triggered by current->work.syscall_trace
476  */
477 asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
478 {
479 	if (unlikely(current->audit_context) && entryexit)
480 		audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
481 		                   regs->regs[2]);
482 
483 	if (!(current->ptrace & PT_PTRACED))
484 		goto out;
485 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
486 		goto out;
487 
488 	/* The 0x80 provides a way for the tracing parent to distinguish
489 	   between a syscall stop and SIGTRAP delivery */
490 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
491 	                         0x80 : 0));
492 
493 	/*
494 	 * this isn't the same as continuing with a signal, but it will do
495 	 * for normal use.  strace only continues with a signal if the
496 	 * stopping signal is not SIGTRAP.  -brl
497 	 */
498 	if (current->exit_code) {
499 		send_sig(current->exit_code, current, 1);
500 		current->exit_code = 0;
501 	}
502  out:
503 	if (unlikely(current->audit_context) && !entryexit)
504 		audit_syscall_entry(current, audit_arch(), regs->regs[2],
505 				    regs->regs[4], regs->regs[5],
506 				    regs->regs[6], regs->regs[7]);
507 }
508