xref: /linux/arch/mips/kernel/ptrace.c (revision 7b12b9137930eb821b68e1bfa11e9de692208620) 
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/config.h>
18 #include <linux/compiler.h>
19 #include <linux/kernel.h>
20 #include <linux/sched.h>
21 #include <linux/mm.h>
22 #include <linux/errno.h>
23 #include <linux/ptrace.h>
24 #include <linux/audit.h>
25 #include <linux/smp.h>
26 #include <linux/smp_lock.h>
27 #include <linux/user.h>
28 #include <linux/security.h>
29 #include <linux/signal.h>
30 
31 #include <asm/byteorder.h>
32 #include <asm/cpu.h>
33 #include <asm/dsp.h>
34 #include <asm/fpu.h>
35 #include <asm/mipsregs.h>
36 #include <asm/mipsmtregs.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <asm/system.h>
40 #include <asm/uaccess.h>
41 #include <asm/bootinfo.h>
42 #include <asm/reg.h>
43 
44 /*
45  * Called by kernel/ptrace.c when detaching..
46  *
47  * Make sure single step bits etc are not set.
48  */
49 void ptrace_disable(struct task_struct *child)
50 {
51 	/* Nothing to do.. */
52 }
53 
54 /*
55  * Read a general register set.  We always use the 64-bit format, even
56  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
57  * Registers are sign extended to fill the available space.
58  */
59 int ptrace_getregs (struct task_struct *child, __s64 __user *data)
60 {
61 	struct pt_regs *regs;
62 	int i;
63 
64 	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
65 		return -EIO;
66 
67 	regs = task_pt_regs(child);
68 
69 	for (i = 0; i < 32; i++)
70 		__put_user (regs->regs[i], data + i);
71 	__put_user (regs->lo, data + EF_LO - EF_R0);
72 	__put_user (regs->hi, data + EF_HI - EF_R0);
73 	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
74 	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
75 	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
76 	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
77 
78 	return 0;
79 }
80 
81 /*
82  * Write a general register set.  As for PTRACE_GETREGS, we always use
83  * the 64-bit format.  On a 32-bit kernel only the lower order half
84  * (according to endianness) will be used.
85  */
86 int ptrace_setregs (struct task_struct *child, __s64 __user *data)
87 {
88 	struct pt_regs *regs;
89 	int i;
90 
91 	if (!access_ok(VERIFY_READ, data, 38 * 8))
92 		return -EIO;
93 
94 	regs = task_pt_regs(child);
95 
96 	for (i = 0; i < 32; i++)
97 		__get_user (regs->regs[i], data + i);
98 	__get_user (regs->lo, data + EF_LO - EF_R0);
99 	__get_user (regs->hi, data + EF_HI - EF_R0);
100 	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
101 
102 	/* badvaddr, status, and cause may not be written.  */
103 
104 	return 0;
105 }
106 
107 int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
108 {
109 	int i;
110 
111 	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
112 		return -EIO;
113 
114 	if (tsk_used_math(child)) {
115 		fpureg_t *fregs = get_fpu_regs(child);
116 		for (i = 0; i < 32; i++)
117 			__put_user (fregs[i], i + (__u64 __user *) data);
118 	} else {
119 		for (i = 0; i < 32; i++)
120 			__put_user ((__u64) -1, i + (__u64 __user *) data);
121 	}
122 
123 	if (cpu_has_fpu) {
124 		unsigned int flags, tmp;
125 
126 		__put_user (child->thread.fpu.hard.fcr31, data + 64);
127 
128 		preempt_disable();
129 		if (cpu_has_mipsmt) {
130 			unsigned int vpflags = dvpe();
131 			flags = read_c0_status();
132 			__enable_fpu();
133 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
134 			write_c0_status(flags);
135 			evpe(vpflags);
136 		} else {
137 			flags = read_c0_status();
138 			__enable_fpu();
139 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
140 			write_c0_status(flags);
141 		}
142 		preempt_enable();
143 		__put_user (tmp, data + 65);
144 	} else {
145 		__put_user (child->thread.fpu.soft.fcr31, data + 64);
146 		__put_user ((__u32) 0, data + 65);
147 	}
148 
149 	return 0;
150 }
151 
152 int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
153 {
154 	fpureg_t *fregs;
155 	int i;
156 
157 	if (!access_ok(VERIFY_READ, data, 33 * 8))
158 		return -EIO;
159 
160 	fregs = get_fpu_regs(child);
161 
162 	for (i = 0; i < 32; i++)
163 		__get_user (fregs[i], i + (__u64 __user *) data);
164 
165 	if (cpu_has_fpu)
166 		__get_user (child->thread.fpu.hard.fcr31, data + 64);
167 	else
168 		__get_user (child->thread.fpu.soft.fcr31, data + 64);
169 
170 	/* FIR may not be written.  */
171 
172 	return 0;
173 }
174 
175 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
176 {
177 	int ret;
178 
179 	switch (request) {
180 	/* when I and D space are separate, these will need to be fixed. */
181 	case PTRACE_PEEKTEXT: /* read word at location addr. */
182 	case PTRACE_PEEKDATA: {
183 		unsigned long tmp;
184 		int copied;
185 
186 		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
187 		ret = -EIO;
188 		if (copied != sizeof(tmp))
189 			break;
190 		ret = put_user(tmp,(unsigned long __user *) data);
191 		break;
192 	}
193 
194 	/* Read the word at location addr in the USER area. */
195 	case PTRACE_PEEKUSR: {
196 		struct pt_regs *regs;
197 		unsigned long tmp = 0;
198 
199 		regs = task_pt_regs(child);
200 		ret = 0;  /* Default return value. */
201 
202 		switch (addr) {
203 		case 0 ... 31:
204 			tmp = regs->regs[addr];
205 			break;
206 		case FPR_BASE ... FPR_BASE + 31:
207 			if (tsk_used_math(child)) {
208 				fpureg_t *fregs = get_fpu_regs(child);
209 
210 #ifdef CONFIG_32BIT
211 				/*
212 				 * The odd registers are actually the high
213 				 * order bits of the values stored in the even
214 				 * registers - unless we're using r2k_switch.S.
215 				 */
216 				if (addr & 1)
217 					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
218 				else
219 					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
220 #endif
221 #ifdef CONFIG_64BIT
222 				tmp = fregs[addr - FPR_BASE];
223 #endif
224 			} else {
225 				tmp = -1;	/* FP not yet used  */
226 			}
227 			break;
228 		case PC:
229 			tmp = regs->cp0_epc;
230 			break;
231 		case CAUSE:
232 			tmp = regs->cp0_cause;
233 			break;
234 		case BADVADDR:
235 			tmp = regs->cp0_badvaddr;
236 			break;
237 		case MMHI:
238 			tmp = regs->hi;
239 			break;
240 		case MMLO:
241 			tmp = regs->lo;
242 			break;
243 		case FPC_CSR:
244 			if (cpu_has_fpu)
245 				tmp = child->thread.fpu.hard.fcr31;
246 			else
247 				tmp = child->thread.fpu.soft.fcr31;
248 			break;
249 		case FPC_EIR: {	/* implementation / version register */
250 			unsigned int flags;
251 #ifdef CONFIG_MIPS_MT_SMTC
252 			unsigned int irqflags;
253 			unsigned int mtflags;
254 #endif /* CONFIG_MIPS_MT_SMTC */
255 
256 			if (!cpu_has_fpu)
257 				break;
258 
259 #ifdef CONFIG_MIPS_MT_SMTC
260 			/* Read-modify-write of Status must be atomic */
261 			local_irq_save(irqflags);
262 			mtflags = dmt();
263 #endif /* CONFIG_MIPS_MT_SMTC */
264 
265 			preempt_disable();
266 			if (cpu_has_mipsmt) {
267 				unsigned int vpflags = dvpe();
268 				flags = read_c0_status();
269 				__enable_fpu();
270 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
271 				write_c0_status(flags);
272 				evpe(vpflags);
273 			} else {
274 				flags = read_c0_status();
275 				__enable_fpu();
276 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
277 				write_c0_status(flags);
278 			}
279 #ifdef CONFIG_MIPS_MT_SMTC
280 			emt(mtflags);
281 			local_irq_restore(irqflags);
282 #endif /* CONFIG_MIPS_MT_SMTC */
283 			preempt_enable();
284 			break;
285 		}
286 		case DSP_BASE ... DSP_BASE + 5: {
287 			dspreg_t *dregs;
288 
289 			if (!cpu_has_dsp) {
290 				tmp = 0;
291 				ret = -EIO;
292 				goto out;
293 			}
294 			dregs = __get_dsp_regs(child);
295 			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
296 			break;
297 		}
298 		case DSP_CONTROL:
299 			if (!cpu_has_dsp) {
300 				tmp = 0;
301 				ret = -EIO;
302 				goto out;
303 			}
304 			tmp = child->thread.dsp.dspcontrol;
305 			break;
306 		default:
307 			tmp = 0;
308 			ret = -EIO;
309 			goto out;
310 		}
311 		ret = put_user(tmp, (unsigned long __user *) data);
312 		break;
313 	}
314 
315 	/* when I and D space are separate, this will have to be fixed. */
316 	case PTRACE_POKETEXT: /* write the word at location addr. */
317 	case PTRACE_POKEDATA:
318 		ret = 0;
319 		if (access_process_vm(child, addr, &data, sizeof(data), 1)
320 		    == sizeof(data))
321 			break;
322 		ret = -EIO;
323 		break;
324 
325 	case PTRACE_POKEUSR: {
326 		struct pt_regs *regs;
327 		ret = 0;
328 		regs = task_pt_regs(child);
329 
330 		switch (addr) {
331 		case 0 ... 31:
332 			regs->regs[addr] = data;
333 			break;
334 		case FPR_BASE ... FPR_BASE + 31: {
335 			fpureg_t *fregs = get_fpu_regs(child);
336 
337 			if (!tsk_used_math(child)) {
338 				/* FP not yet used  */
339 				memset(&child->thread.fpu.hard, ~0,
340 				       sizeof(child->thread.fpu.hard));
341 				child->thread.fpu.hard.fcr31 = 0;
342 			}
343 #ifdef CONFIG_32BIT
344 			/*
345 			 * The odd registers are actually the high order bits
346 			 * of the values stored in the even registers - unless
347 			 * we're using r2k_switch.S.
348 			 */
349 			if (addr & 1) {
350 				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
351 				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
352 			} else {
353 				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
354 				fregs[addr - FPR_BASE] |= data;
355 			}
356 #endif
357 #ifdef CONFIG_64BIT
358 			fregs[addr - FPR_BASE] = data;
359 #endif
360 			break;
361 		}
362 		case PC:
363 			regs->cp0_epc = data;
364 			break;
365 		case MMHI:
366 			regs->hi = data;
367 			break;
368 		case MMLO:
369 			regs->lo = data;
370 			break;
371 		case FPC_CSR:
372 			if (cpu_has_fpu)
373 				child->thread.fpu.hard.fcr31 = data;
374 			else
375 				child->thread.fpu.soft.fcr31 = data;
376 			break;
377 		case DSP_BASE ... DSP_BASE + 5: {
378 			dspreg_t *dregs;
379 
380 			if (!cpu_has_dsp) {
381 				ret = -EIO;
382 				break;
383 			}
384 
385 			dregs = __get_dsp_regs(child);
386 			dregs[addr - DSP_BASE] = data;
387 			break;
388 		}
389 		case DSP_CONTROL:
390 			if (!cpu_has_dsp) {
391 				ret = -EIO;
392 				break;
393 			}
394 			child->thread.dsp.dspcontrol = data;
395 			break;
396 		default:
397 			/* The rest are not allowed. */
398 			ret = -EIO;
399 			break;
400 		}
401 		break;
402 		}
403 
404 	case PTRACE_GETREGS:
405 		ret = ptrace_getregs (child, (__u64 __user *) data);
406 		break;
407 
408 	case PTRACE_SETREGS:
409 		ret = ptrace_setregs (child, (__u64 __user *) data);
410 		break;
411 
412 	case PTRACE_GETFPREGS:
413 		ret = ptrace_getfpregs (child, (__u32 __user *) data);
414 		break;
415 
416 	case PTRACE_SETFPREGS:
417 		ret = ptrace_setfpregs (child, (__u32 __user *) data);
418 		break;
419 
420 	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
421 	case PTRACE_CONT: { /* restart after signal. */
422 		ret = -EIO;
423 		if (!valid_signal(data))
424 			break;
425 		if (request == PTRACE_SYSCALL) {
426 			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
427 		}
428 		else {
429 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
430 		}
431 		child->exit_code = data;
432 		wake_up_process(child);
433 		ret = 0;
434 		break;
435 	}
436 
437 	/*
438 	 * make the child exit.  Best I can do is send it a sigkill.
439 	 * perhaps it should be put in the status that it wants to
440 	 * exit.
441 	 */
442 	case PTRACE_KILL:
443 		ret = 0;
444 		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
445 			break;
446 		child->exit_code = SIGKILL;
447 		wake_up_process(child);
448 		break;
449 
450 	case PTRACE_DETACH: /* detach a process that was attached. */
451 		ret = ptrace_detach(child, data);
452 		break;
453 
454 	case PTRACE_GET_THREAD_AREA:
455 		ret = put_user(task_thread_info(child)->tp_value,
456 				(unsigned long __user *) data);
457 		break;
458 
459 	default:
460 		ret = ptrace_request(child, request, addr, data);
461 		break;
462 	}
463  out:
464 	return ret;
465 }
466 
467 static inline int audit_arch(void)
468 {
469 	int arch = EM_MIPS;
470 #ifdef CONFIG_64BIT
471 	arch |=  __AUDIT_ARCH_64BIT;
472 #endif
473 #if defined(__LITTLE_ENDIAN)
474 	arch |=  __AUDIT_ARCH_LE;
475 #endif
476 	return arch;
477 }
478 
479 /*
480  * Notification of system call entry/exit
481  * - triggered by current->work.syscall_trace
482  */
483 asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
484 {
485 	if (unlikely(current->audit_context) && entryexit)
486 		audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
487 		                   regs->regs[2]);
488 
489 	if (!(current->ptrace & PT_PTRACED))
490 		goto out;
491 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
492 		goto out;
493 
494 	/* The 0x80 provides a way for the tracing parent to distinguish
495 	   between a syscall stop and SIGTRAP delivery */
496 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
497 	                         0x80 : 0));
498 
499 	/*
500 	 * this isn't the same as continuing with a signal, but it will do
501 	 * for normal use.  strace only continues with a signal if the
502 	 * stopping signal is not SIGTRAP.  -brl
503 	 */
504 	if (current->exit_code) {
505 		send_sig(current->exit_code, current, 1);
506 		current->exit_code = 0;
507 	}
508  out:
509 	if (unlikely(current->audit_context) && !entryexit)
510 		audit_syscall_entry(current, audit_arch(), regs->regs[2],
511 				    regs->regs[4], regs->regs[5],
512 				    regs->regs[6], regs->regs[7]);
513 }
514