xref: /linux/arch/mips/kernel/ptrace.c (revision 14b42963f64b98ab61fa9723c03d71aa5ef4f862) 
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/compiler.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/mm.h>
21 #include <linux/errno.h>
22 #include <linux/ptrace.h>
23 #include <linux/audit.h>
24 #include <linux/smp.h>
25 #include <linux/smp_lock.h>
26 #include <linux/user.h>
27 #include <linux/security.h>
28 #include <linux/signal.h>
29 
30 #include <asm/byteorder.h>
31 #include <asm/cpu.h>
32 #include <asm/dsp.h>
33 #include <asm/fpu.h>
34 #include <asm/mipsregs.h>
35 #include <asm/mipsmtregs.h>
36 #include <asm/pgtable.h>
37 #include <asm/page.h>
38 #include <asm/system.h>
39 #include <asm/uaccess.h>
40 #include <asm/bootinfo.h>
41 #include <asm/reg.h>
42 
43 /*
44  * Called by kernel/ptrace.c when detaching..
45  *
46  * Make sure single step bits etc are not set.
47  */
48 void ptrace_disable(struct task_struct *child)
49 {
50 	/* Nothing to do.. */
51 }
52 
53 /*
54  * Read a general register set.  We always use the 64-bit format, even
55  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
56  * Registers are sign extended to fill the available space.
57  */
58 int ptrace_getregs (struct task_struct *child, __s64 __user *data)
59 {
60 	struct pt_regs *regs;
61 	int i;
62 
63 	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
64 		return -EIO;
65 
66 	regs = task_pt_regs(child);
67 
68 	for (i = 0; i < 32; i++)
69 		__put_user (regs->regs[i], data + i);
70 	__put_user (regs->lo, data + EF_LO - EF_R0);
71 	__put_user (regs->hi, data + EF_HI - EF_R0);
72 	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
73 	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
74 	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
75 	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
76 
77 	return 0;
78 }
79 
80 /*
81  * Write a general register set.  As for PTRACE_GETREGS, we always use
82  * the 64-bit format.  On a 32-bit kernel only the lower order half
83  * (according to endianness) will be used.
84  */
85 int ptrace_setregs (struct task_struct *child, __s64 __user *data)
86 {
87 	struct pt_regs *regs;
88 	int i;
89 
90 	if (!access_ok(VERIFY_READ, data, 38 * 8))
91 		return -EIO;
92 
93 	regs = task_pt_regs(child);
94 
95 	for (i = 0; i < 32; i++)
96 		__get_user (regs->regs[i], data + i);
97 	__get_user (regs->lo, data + EF_LO - EF_R0);
98 	__get_user (regs->hi, data + EF_HI - EF_R0);
99 	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
100 
101 	/* badvaddr, status, and cause may not be written.  */
102 
103 	return 0;
104 }
105 
106 int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
107 {
108 	int i;
109 
110 	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
111 		return -EIO;
112 
113 	if (tsk_used_math(child)) {
114 		fpureg_t *fregs = get_fpu_regs(child);
115 		for (i = 0; i < 32; i++)
116 			__put_user (fregs[i], i + (__u64 __user *) data);
117 	} else {
118 		for (i = 0; i < 32; i++)
119 			__put_user ((__u64) -1, i + (__u64 __user *) data);
120 	}
121 
122 	__put_user (child->thread.fpu.fcr31, data + 64);
123 
124 	if (cpu_has_fpu) {
125 		unsigned int flags, tmp;
126 
127 		preempt_disable();
128 		if (cpu_has_mipsmt) {
129 			unsigned int vpflags = dvpe();
130 			flags = read_c0_status();
131 			__enable_fpu();
132 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
133 			write_c0_status(flags);
134 			evpe(vpflags);
135 		} else {
136 			flags = read_c0_status();
137 			__enable_fpu();
138 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
139 			write_c0_status(flags);
140 		}
141 		preempt_enable();
142 		__put_user (tmp, data + 65);
143 	} else {
144 		__put_user ((__u32) 0, data + 65);
145 	}
146 
147 	return 0;
148 }
149 
150 int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
151 {
152 	fpureg_t *fregs;
153 	int i;
154 
155 	if (!access_ok(VERIFY_READ, data, 33 * 8))
156 		return -EIO;
157 
158 	fregs = get_fpu_regs(child);
159 
160 	for (i = 0; i < 32; i++)
161 		__get_user (fregs[i], i + (__u64 __user *) data);
162 
163 	__get_user (child->thread.fpu.fcr31, data + 64);
164 
165 	/* FIR may not be written.  */
166 
167 	return 0;
168 }
169 
170 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
171 {
172 	int ret;
173 
174 	switch (request) {
175 	/* when I and D space are separate, these will need to be fixed. */
176 	case PTRACE_PEEKTEXT: /* read word at location addr. */
177 	case PTRACE_PEEKDATA: {
178 		unsigned long tmp;
179 		int copied;
180 
181 		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
182 		ret = -EIO;
183 		if (copied != sizeof(tmp))
184 			break;
185 		ret = put_user(tmp,(unsigned long __user *) data);
186 		break;
187 	}
188 
189 	/* Read the word at location addr in the USER area. */
190 	case PTRACE_PEEKUSR: {
191 		struct pt_regs *regs;
192 		unsigned long tmp = 0;
193 
194 		regs = task_pt_regs(child);
195 		ret = 0;  /* Default return value. */
196 
197 		switch (addr) {
198 		case 0 ... 31:
199 			tmp = regs->regs[addr];
200 			break;
201 		case FPR_BASE ... FPR_BASE + 31:
202 			if (tsk_used_math(child)) {
203 				fpureg_t *fregs = get_fpu_regs(child);
204 
205 #ifdef CONFIG_32BIT
206 				/*
207 				 * The odd registers are actually the high
208 				 * order bits of the values stored in the even
209 				 * registers - unless we're using r2k_switch.S.
210 				 */
211 				if (addr & 1)
212 					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
213 				else
214 					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
215 #endif
216 #ifdef CONFIG_64BIT
217 				tmp = fregs[addr - FPR_BASE];
218 #endif
219 			} else {
220 				tmp = -1;	/* FP not yet used  */
221 			}
222 			break;
223 		case PC:
224 			tmp = regs->cp0_epc;
225 			break;
226 		case CAUSE:
227 			tmp = regs->cp0_cause;
228 			break;
229 		case BADVADDR:
230 			tmp = regs->cp0_badvaddr;
231 			break;
232 		case MMHI:
233 			tmp = regs->hi;
234 			break;
235 		case MMLO:
236 			tmp = regs->lo;
237 			break;
238 		case FPC_CSR:
239 			tmp = child->thread.fpu.fcr31;
240 			break;
241 		case FPC_EIR: {	/* implementation / version register */
242 			unsigned int flags;
243 #ifdef CONFIG_MIPS_MT_SMTC
244 			unsigned int irqflags;
245 			unsigned int mtflags;
246 #endif /* CONFIG_MIPS_MT_SMTC */
247 
248 			if (!cpu_has_fpu)
249 				break;
250 
251 #ifdef CONFIG_MIPS_MT_SMTC
252 			/* Read-modify-write of Status must be atomic */
253 			local_irq_save(irqflags);
254 			mtflags = dmt();
255 #endif /* CONFIG_MIPS_MT_SMTC */
256 
257 			preempt_disable();
258 			if (cpu_has_mipsmt) {
259 				unsigned int vpflags = dvpe();
260 				flags = read_c0_status();
261 				__enable_fpu();
262 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
263 				write_c0_status(flags);
264 				evpe(vpflags);
265 			} else {
266 				flags = read_c0_status();
267 				__enable_fpu();
268 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
269 				write_c0_status(flags);
270 			}
271 #ifdef CONFIG_MIPS_MT_SMTC
272 			emt(mtflags);
273 			local_irq_restore(irqflags);
274 #endif /* CONFIG_MIPS_MT_SMTC */
275 			preempt_enable();
276 			break;
277 		}
278 		case DSP_BASE ... DSP_BASE + 5: {
279 			dspreg_t *dregs;
280 
281 			if (!cpu_has_dsp) {
282 				tmp = 0;
283 				ret = -EIO;
284 				goto out;
285 			}
286 			dregs = __get_dsp_regs(child);
287 			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
288 			break;
289 		}
290 		case DSP_CONTROL:
291 			if (!cpu_has_dsp) {
292 				tmp = 0;
293 				ret = -EIO;
294 				goto out;
295 			}
296 			tmp = child->thread.dsp.dspcontrol;
297 			break;
298 		default:
299 			tmp = 0;
300 			ret = -EIO;
301 			goto out;
302 		}
303 		ret = put_user(tmp, (unsigned long __user *) data);
304 		break;
305 	}
306 
307 	/* when I and D space are separate, this will have to be fixed. */
308 	case PTRACE_POKETEXT: /* write the word at location addr. */
309 	case PTRACE_POKEDATA:
310 		ret = 0;
311 		if (access_process_vm(child, addr, &data, sizeof(data), 1)
312 		    == sizeof(data))
313 			break;
314 		ret = -EIO;
315 		break;
316 
317 	case PTRACE_POKEUSR: {
318 		struct pt_regs *regs;
319 		ret = 0;
320 		regs = task_pt_regs(child);
321 
322 		switch (addr) {
323 		case 0 ... 31:
324 			regs->regs[addr] = data;
325 			break;
326 		case FPR_BASE ... FPR_BASE + 31: {
327 			fpureg_t *fregs = get_fpu_regs(child);
328 
329 			if (!tsk_used_math(child)) {
330 				/* FP not yet used  */
331 				memset(&child->thread.fpu, ~0,
332 				       sizeof(child->thread.fpu));
333 				child->thread.fpu.fcr31 = 0;
334 			}
335 #ifdef CONFIG_32BIT
336 			/*
337 			 * The odd registers are actually the high order bits
338 			 * of the values stored in the even registers - unless
339 			 * we're using r2k_switch.S.
340 			 */
341 			if (addr & 1) {
342 				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
343 				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
344 			} else {
345 				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
346 				fregs[addr - FPR_BASE] |= data;
347 			}
348 #endif
349 #ifdef CONFIG_64BIT
350 			fregs[addr - FPR_BASE] = data;
351 #endif
352 			break;
353 		}
354 		case PC:
355 			regs->cp0_epc = data;
356 			break;
357 		case MMHI:
358 			regs->hi = data;
359 			break;
360 		case MMLO:
361 			regs->lo = data;
362 			break;
363 		case FPC_CSR:
364 			child->thread.fpu.fcr31 = data;
365 			break;
366 		case DSP_BASE ... DSP_BASE + 5: {
367 			dspreg_t *dregs;
368 
369 			if (!cpu_has_dsp) {
370 				ret = -EIO;
371 				break;
372 			}
373 
374 			dregs = __get_dsp_regs(child);
375 			dregs[addr - DSP_BASE] = data;
376 			break;
377 		}
378 		case DSP_CONTROL:
379 			if (!cpu_has_dsp) {
380 				ret = -EIO;
381 				break;
382 			}
383 			child->thread.dsp.dspcontrol = data;
384 			break;
385 		default:
386 			/* The rest are not allowed. */
387 			ret = -EIO;
388 			break;
389 		}
390 		break;
391 		}
392 
393 	case PTRACE_GETREGS:
394 		ret = ptrace_getregs (child, (__u64 __user *) data);
395 		break;
396 
397 	case PTRACE_SETREGS:
398 		ret = ptrace_setregs (child, (__u64 __user *) data);
399 		break;
400 
401 	case PTRACE_GETFPREGS:
402 		ret = ptrace_getfpregs (child, (__u32 __user *) data);
403 		break;
404 
405 	case PTRACE_SETFPREGS:
406 		ret = ptrace_setfpregs (child, (__u32 __user *) data);
407 		break;
408 
409 	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
410 	case PTRACE_CONT: { /* restart after signal. */
411 		ret = -EIO;
412 		if (!valid_signal(data))
413 			break;
414 		if (request == PTRACE_SYSCALL) {
415 			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
416 		}
417 		else {
418 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
419 		}
420 		child->exit_code = data;
421 		wake_up_process(child);
422 		ret = 0;
423 		break;
424 	}
425 
426 	/*
427 	 * make the child exit.  Best I can do is send it a sigkill.
428 	 * perhaps it should be put in the status that it wants to
429 	 * exit.
430 	 */
431 	case PTRACE_KILL:
432 		ret = 0;
433 		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
434 			break;
435 		child->exit_code = SIGKILL;
436 		wake_up_process(child);
437 		break;
438 
439 	case PTRACE_DETACH: /* detach a process that was attached. */
440 		ret = ptrace_detach(child, data);
441 		break;
442 
443 	case PTRACE_GET_THREAD_AREA:
444 		ret = put_user(task_thread_info(child)->tp_value,
445 				(unsigned long __user *) data);
446 		break;
447 
448 	default:
449 		ret = ptrace_request(child, request, addr, data);
450 		break;
451 	}
452  out:
453 	return ret;
454 }
455 
456 static inline int audit_arch(void)
457 {
458 	int arch = EM_MIPS;
459 #ifdef CONFIG_64BIT
460 	arch |=  __AUDIT_ARCH_64BIT;
461 #endif
462 #if defined(__LITTLE_ENDIAN)
463 	arch |=  __AUDIT_ARCH_LE;
464 #endif
465 	return arch;
466 }
467 
468 /*
469  * Notification of system call entry/exit
470  * - triggered by current->work.syscall_trace
471  */
472 asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
473 {
474 	if (unlikely(current->audit_context) && entryexit)
475 		audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
476 		                   regs->regs[2]);
477 
478 	if (!(current->ptrace & PT_PTRACED))
479 		goto out;
480 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
481 		goto out;
482 
483 	/* The 0x80 provides a way for the tracing parent to distinguish
484 	   between a syscall stop and SIGTRAP delivery */
485 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
486 	                         0x80 : 0));
487 
488 	/*
489 	 * this isn't the same as continuing with a signal, but it will do
490 	 * for normal use.  strace only continues with a signal if the
491 	 * stopping signal is not SIGTRAP.  -brl
492 	 */
493 	if (current->exit_code) {
494 		send_sig(current->exit_code, current, 1);
495 		current->exit_code = 0;
496 	}
497  out:
498 	if (unlikely(current->audit_context) && !entryexit)
499 		audit_syscall_entry(audit_arch(), regs->regs[2],
500 				    regs->regs[4], regs->regs[5],
501 				    regs->regs[6], regs->regs[7]);
502 }
503