1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others. 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org) 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 2004 Thiemo Seufer 10 * Copyright (C) 2013 Imagination Technologies Ltd. 11 */ 12 #include <linux/errno.h> 13 #include <linux/sched.h> 14 #include <linux/tick.h> 15 #include <linux/kernel.h> 16 #include <linux/mm.h> 17 #include <linux/stddef.h> 18 #include <linux/unistd.h> 19 #include <linux/export.h> 20 #include <linux/ptrace.h> 21 #include <linux/mman.h> 22 #include <linux/personality.h> 23 #include <linux/sys.h> 24 #include <linux/init.h> 25 #include <linux/completion.h> 26 #include <linux/kallsyms.h> 27 #include <linux/random.h> 28 #include <linux/prctl.h> 29 30 #include <asm/asm.h> 31 #include <asm/bootinfo.h> 32 #include <asm/cpu.h> 33 #include <asm/dsemul.h> 34 #include <asm/dsp.h> 35 #include <asm/fpu.h> 36 #include <asm/msa.h> 37 #include <asm/pgtable.h> 38 #include <asm/mipsregs.h> 39 #include <asm/processor.h> 40 #include <asm/reg.h> 41 #include <asm/uaccess.h> 42 #include <asm/io.h> 43 #include <asm/elf.h> 44 #include <asm/isadep.h> 45 #include <asm/inst.h> 46 #include <asm/stacktrace.h> 47 #include <asm/irq_regs.h> 48 49 #ifdef CONFIG_HOTPLUG_CPU 50 void arch_cpu_idle_dead(void) 51 { 52 /* What the heck is this check doing ? */ 53 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map)) 54 play_dead(); 55 } 56 #endif 57 58 asmlinkage void ret_from_fork(void); 59 asmlinkage void ret_from_kernel_thread(void); 60 61 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) 62 { 63 unsigned long status; 64 65 /* New thread loses kernel privileges. */ 66 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK); 67 status |= KU_USER; 68 regs->cp0_status = status; 69 lose_fpu(0); 70 clear_thread_flag(TIF_MSA_CTX_LIVE); 71 clear_used_math(); 72 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE); 73 init_dsp(); 74 regs->cp0_epc = pc; 75 regs->regs[29] = sp; 76 } 77 78 void exit_thread(struct task_struct *tsk) 79 { 80 /* 81 * User threads may have allocated a delay slot emulation frame. 82 * If so, clean up that allocation. 83 */ 84 if (!(current->flags & PF_KTHREAD)) 85 dsemul_thread_cleanup(tsk); 86 } 87 88 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 89 { 90 /* 91 * Save any process state which is live in hardware registers to the 92 * parent context prior to duplication. This prevents the new child 93 * state becoming stale if the parent is preempted before copy_thread() 94 * gets a chance to save the parent's live hardware registers to the 95 * child context. 96 */ 97 preempt_disable(); 98 99 if (is_msa_enabled()) 100 save_msa(current); 101 else if (is_fpu_owner()) 102 _save_fp(current); 103 104 save_dsp(current); 105 106 preempt_enable(); 107 108 *dst = *src; 109 return 0; 110 } 111 112 /* 113 * Copy architecture-specific thread state 114 */ 115 int copy_thread(unsigned long clone_flags, unsigned long usp, 116 unsigned long kthread_arg, struct task_struct *p) 117 { 118 struct thread_info *ti = task_thread_info(p); 119 struct pt_regs *childregs, *regs = current_pt_regs(); 120 unsigned long childksp; 121 p->set_child_tid = p->clear_child_tid = NULL; 122 123 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; 124 125 /* set up new TSS. */ 126 childregs = (struct pt_regs *) childksp - 1; 127 /* Put the stack after the struct pt_regs. */ 128 childksp = (unsigned long) childregs; 129 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1); 130 if (unlikely(p->flags & PF_KTHREAD)) { 131 /* kernel thread */ 132 unsigned long status = p->thread.cp0_status; 133 memset(childregs, 0, sizeof(struct pt_regs)); 134 ti->addr_limit = KERNEL_DS; 135 p->thread.reg16 = usp; /* fn */ 136 p->thread.reg17 = kthread_arg; 137 p->thread.reg29 = childksp; 138 p->thread.reg31 = (unsigned long) ret_from_kernel_thread; 139 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 140 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) | 141 ((status & (ST0_KUC | ST0_IEC)) << 2); 142 #else 143 status |= ST0_EXL; 144 #endif 145 childregs->cp0_status = status; 146 return 0; 147 } 148 149 /* user thread */ 150 *childregs = *regs; 151 childregs->regs[7] = 0; /* Clear error flag */ 152 childregs->regs[2] = 0; /* Child gets zero as return value */ 153 if (usp) 154 childregs->regs[29] = usp; 155 ti->addr_limit = USER_DS; 156 157 p->thread.reg29 = (unsigned long) childregs; 158 p->thread.reg31 = (unsigned long) ret_from_fork; 159 160 /* 161 * New tasks lose permission to use the fpu. This accelerates context 162 * switching for most programs since they don't use the fpu. 163 */ 164 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1); 165 166 clear_tsk_thread_flag(p, TIF_USEDFPU); 167 clear_tsk_thread_flag(p, TIF_USEDMSA); 168 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE); 169 170 #ifdef CONFIG_MIPS_MT_FPAFF 171 clear_tsk_thread_flag(p, TIF_FPUBOUND); 172 #endif /* CONFIG_MIPS_MT_FPAFF */ 173 174 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE); 175 176 if (clone_flags & CLONE_SETTLS) 177 ti->tp_value = regs->regs[7]; 178 179 return 0; 180 } 181 182 #ifdef CONFIG_CC_STACKPROTECTOR 183 #include <linux/stackprotector.h> 184 unsigned long __stack_chk_guard __read_mostly; 185 EXPORT_SYMBOL(__stack_chk_guard); 186 #endif 187 188 struct mips_frame_info { 189 void *func; 190 unsigned long func_size; 191 int frame_size; 192 int pc_offset; 193 }; 194 195 #define J_TARGET(pc,target) \ 196 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2)) 197 198 static inline int is_ra_save_ins(union mips_instruction *ip) 199 { 200 #ifdef CONFIG_CPU_MICROMIPS 201 union mips_instruction mmi; 202 203 /* 204 * swsp ra,offset 205 * swm16 reglist,offset(sp) 206 * swm32 reglist,offset(sp) 207 * sw32 ra,offset(sp) 208 * jradiussp - NOT SUPPORTED 209 * 210 * microMIPS is way more fun... 211 */ 212 if (mm_insn_16bit(ip->halfword[0])) { 213 mmi.word = (ip->halfword[0] << 16); 214 return (mmi.mm16_r5_format.opcode == mm_swsp16_op && 215 mmi.mm16_r5_format.rt == 31) || 216 (mmi.mm16_m_format.opcode == mm_pool16c_op && 217 mmi.mm16_m_format.func == mm_swm16_op); 218 } 219 else { 220 mmi.halfword[0] = ip->halfword[1]; 221 mmi.halfword[1] = ip->halfword[0]; 222 return (mmi.mm_m_format.opcode == mm_pool32b_op && 223 mmi.mm_m_format.rd > 9 && 224 mmi.mm_m_format.base == 29 && 225 mmi.mm_m_format.func == mm_swm32_func) || 226 (mmi.i_format.opcode == mm_sw32_op && 227 mmi.i_format.rs == 29 && 228 mmi.i_format.rt == 31); 229 } 230 #else 231 /* sw / sd $ra, offset($sp) */ 232 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) && 233 ip->i_format.rs == 29 && 234 ip->i_format.rt == 31; 235 #endif 236 } 237 238 static inline int is_jump_ins(union mips_instruction *ip) 239 { 240 #ifdef CONFIG_CPU_MICROMIPS 241 /* 242 * jr16,jrc,jalr16,jalr16 243 * jal 244 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb 245 * jraddiusp - NOT SUPPORTED 246 * 247 * microMIPS is kind of more fun... 248 */ 249 union mips_instruction mmi; 250 251 mmi.word = (ip->halfword[0] << 16); 252 253 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op && 254 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) || 255 ip->j_format.opcode == mm_jal32_op) 256 return 1; 257 if (ip->r_format.opcode != mm_pool32a_op || 258 ip->r_format.func != mm_pool32axf_op) 259 return 0; 260 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op; 261 #else 262 if (ip->j_format.opcode == j_op) 263 return 1; 264 if (ip->j_format.opcode == jal_op) 265 return 1; 266 if (ip->r_format.opcode != spec_op) 267 return 0; 268 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op; 269 #endif 270 } 271 272 static inline int is_sp_move_ins(union mips_instruction *ip) 273 { 274 #ifdef CONFIG_CPU_MICROMIPS 275 /* 276 * addiusp -imm 277 * addius5 sp,-imm 278 * addiu32 sp,sp,-imm 279 * jradiussp - NOT SUPPORTED 280 * 281 * microMIPS is not more fun... 282 */ 283 if (mm_insn_16bit(ip->halfword[0])) { 284 union mips_instruction mmi; 285 286 mmi.word = (ip->halfword[0] << 16); 287 return (mmi.mm16_r3_format.opcode == mm_pool16d_op && 288 mmi.mm16_r3_format.simmediate && mm_addiusp_func) || 289 (mmi.mm16_r5_format.opcode == mm_pool16d_op && 290 mmi.mm16_r5_format.rt == 29); 291 } 292 return ip->mm_i_format.opcode == mm_addiu32_op && 293 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29; 294 #else 295 /* addiu/daddiu sp,sp,-imm */ 296 if (ip->i_format.rs != 29 || ip->i_format.rt != 29) 297 return 0; 298 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op) 299 return 1; 300 #endif 301 return 0; 302 } 303 304 static int get_frame_info(struct mips_frame_info *info) 305 { 306 #ifdef CONFIG_CPU_MICROMIPS 307 union mips_instruction *ip = (void *) (((char *) info->func) - 1); 308 #else 309 union mips_instruction *ip = info->func; 310 #endif 311 unsigned max_insns = info->func_size / sizeof(union mips_instruction); 312 unsigned i; 313 314 info->pc_offset = -1; 315 info->frame_size = 0; 316 317 if (!ip) 318 goto err; 319 320 if (max_insns == 0) 321 max_insns = 128U; /* unknown function size */ 322 max_insns = min(128U, max_insns); 323 324 for (i = 0; i < max_insns; i++, ip++) { 325 326 if (is_jump_ins(ip)) 327 break; 328 if (!info->frame_size) { 329 if (is_sp_move_ins(ip)) 330 { 331 #ifdef CONFIG_CPU_MICROMIPS 332 if (mm_insn_16bit(ip->halfword[0])) 333 { 334 unsigned short tmp; 335 336 if (ip->halfword[0] & mm_addiusp_func) 337 { 338 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2); 339 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0)); 340 } else { 341 tmp = (ip->halfword[0] >> 1); 342 info->frame_size = -(signed short)(tmp & 0xf); 343 } 344 ip = (void *) &ip->halfword[1]; 345 ip--; 346 } else 347 #endif 348 info->frame_size = - ip->i_format.simmediate; 349 } 350 continue; 351 } 352 if (info->pc_offset == -1 && is_ra_save_ins(ip)) { 353 info->pc_offset = 354 ip->i_format.simmediate / sizeof(long); 355 break; 356 } 357 } 358 if (info->frame_size && info->pc_offset >= 0) /* nested */ 359 return 0; 360 if (info->pc_offset < 0) /* leaf */ 361 return 1; 362 /* prologue seems bogus... */ 363 err: 364 return -1; 365 } 366 367 static struct mips_frame_info schedule_mfi __read_mostly; 368 369 #ifdef CONFIG_KALLSYMS 370 static unsigned long get___schedule_addr(void) 371 { 372 return kallsyms_lookup_name("__schedule"); 373 } 374 #else 375 static unsigned long get___schedule_addr(void) 376 { 377 union mips_instruction *ip = (void *)schedule; 378 int max_insns = 8; 379 int i; 380 381 for (i = 0; i < max_insns; i++, ip++) { 382 if (ip->j_format.opcode == j_op) 383 return J_TARGET(ip, ip->j_format.target); 384 } 385 return 0; 386 } 387 #endif 388 389 static int __init frame_info_init(void) 390 { 391 unsigned long size = 0; 392 #ifdef CONFIG_KALLSYMS 393 unsigned long ofs; 394 #endif 395 unsigned long addr; 396 397 addr = get___schedule_addr(); 398 if (!addr) 399 addr = (unsigned long)schedule; 400 401 #ifdef CONFIG_KALLSYMS 402 kallsyms_lookup_size_offset(addr, &size, &ofs); 403 #endif 404 schedule_mfi.func = (void *)addr; 405 schedule_mfi.func_size = size; 406 407 get_frame_info(&schedule_mfi); 408 409 /* 410 * Without schedule() frame info, result given by 411 * thread_saved_pc() and get_wchan() are not reliable. 412 */ 413 if (schedule_mfi.pc_offset < 0) 414 printk("Can't analyze schedule() prologue at %p\n", schedule); 415 416 return 0; 417 } 418 419 arch_initcall(frame_info_init); 420 421 /* 422 * Return saved PC of a blocked thread. 423 */ 424 unsigned long thread_saved_pc(struct task_struct *tsk) 425 { 426 struct thread_struct *t = &tsk->thread; 427 428 /* New born processes are a special case */ 429 if (t->reg31 == (unsigned long) ret_from_fork) 430 return t->reg31; 431 if (schedule_mfi.pc_offset < 0) 432 return 0; 433 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; 434 } 435 436 437 #ifdef CONFIG_KALLSYMS 438 /* generic stack unwinding function */ 439 unsigned long notrace unwind_stack_by_address(unsigned long stack_page, 440 unsigned long *sp, 441 unsigned long pc, 442 unsigned long *ra) 443 { 444 struct mips_frame_info info; 445 unsigned long size, ofs; 446 int leaf; 447 extern void ret_from_irq(void); 448 extern void ret_from_exception(void); 449 450 if (!stack_page) 451 return 0; 452 453 /* 454 * If we reached the bottom of interrupt context, 455 * return saved pc in pt_regs. 456 */ 457 if (pc == (unsigned long)ret_from_irq || 458 pc == (unsigned long)ret_from_exception) { 459 struct pt_regs *regs; 460 if (*sp >= stack_page && 461 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) { 462 regs = (struct pt_regs *)*sp; 463 pc = regs->cp0_epc; 464 if (!user_mode(regs) && __kernel_text_address(pc)) { 465 *sp = regs->regs[29]; 466 *ra = regs->regs[31]; 467 return pc; 468 } 469 } 470 return 0; 471 } 472 if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) 473 return 0; 474 /* 475 * Return ra if an exception occurred at the first instruction 476 */ 477 if (unlikely(ofs == 0)) { 478 pc = *ra; 479 *ra = 0; 480 return pc; 481 } 482 483 info.func = (void *)(pc - ofs); 484 info.func_size = ofs; /* analyze from start to ofs */ 485 leaf = get_frame_info(&info); 486 if (leaf < 0) 487 return 0; 488 489 if (*sp < stack_page || 490 *sp + info.frame_size > stack_page + THREAD_SIZE - 32) 491 return 0; 492 493 if (leaf) 494 /* 495 * For some extreme cases, get_frame_info() can 496 * consider wrongly a nested function as a leaf 497 * one. In that cases avoid to return always the 498 * same value. 499 */ 500 pc = pc != *ra ? *ra : 0; 501 else 502 pc = ((unsigned long *)(*sp))[info.pc_offset]; 503 504 *sp += info.frame_size; 505 *ra = 0; 506 return __kernel_text_address(pc) ? pc : 0; 507 } 508 EXPORT_SYMBOL(unwind_stack_by_address); 509 510 /* used by show_backtrace() */ 511 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, 512 unsigned long pc, unsigned long *ra) 513 { 514 unsigned long stack_page = (unsigned long)task_stack_page(task); 515 return unwind_stack_by_address(stack_page, sp, pc, ra); 516 } 517 #endif 518 519 /* 520 * get_wchan - a maintenance nightmare^W^Wpain in the ass ... 521 */ 522 unsigned long get_wchan(struct task_struct *task) 523 { 524 unsigned long pc = 0; 525 #ifdef CONFIG_KALLSYMS 526 unsigned long sp; 527 unsigned long ra = 0; 528 #endif 529 530 if (!task || task == current || task->state == TASK_RUNNING) 531 goto out; 532 if (!task_stack_page(task)) 533 goto out; 534 535 pc = thread_saved_pc(task); 536 537 #ifdef CONFIG_KALLSYMS 538 sp = task->thread.reg29 + schedule_mfi.frame_size; 539 540 while (in_sched_functions(pc)) 541 pc = unwind_stack(task, &sp, pc, &ra); 542 #endif 543 544 out: 545 return pc; 546 } 547 548 /* 549 * Don't forget that the stack pointer must be aligned on a 8 bytes 550 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI. 551 */ 552 unsigned long arch_align_stack(unsigned long sp) 553 { 554 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 555 sp -= get_random_int() & ~PAGE_MASK; 556 557 return sp & ALMASK; 558 } 559 560 static void arch_dump_stack(void *info) 561 { 562 struct pt_regs *regs; 563 564 regs = get_irq_regs(); 565 566 if (regs) 567 show_regs(regs); 568 569 dump_stack(); 570 } 571 572 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) 573 { 574 long this_cpu = get_cpu(); 575 576 if (cpumask_test_cpu(this_cpu, mask) && !exclude_self) 577 dump_stack(); 578 579 smp_call_function_many(mask, arch_dump_stack, NULL, 1); 580 581 put_cpu(); 582 } 583 584 int mips_get_process_fp_mode(struct task_struct *task) 585 { 586 int value = 0; 587 588 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS)) 589 value |= PR_FP_MODE_FR; 590 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS)) 591 value |= PR_FP_MODE_FRE; 592 593 return value; 594 } 595 596 static void prepare_for_fp_mode_switch(void *info) 597 { 598 struct mm_struct *mm = info; 599 600 if (current->mm == mm) 601 lose_fpu(1); 602 } 603 604 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value) 605 { 606 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE; 607 struct task_struct *t; 608 int max_users; 609 610 /* Check the value is valid */ 611 if (value & ~known_bits) 612 return -EOPNOTSUPP; 613 614 /* Avoid inadvertently triggering emulation */ 615 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu && 616 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64)) 617 return -EOPNOTSUPP; 618 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre) 619 return -EOPNOTSUPP; 620 621 /* FR = 0 not supported in MIPS R6 */ 622 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6) 623 return -EOPNOTSUPP; 624 625 /* Proceed with the mode switch */ 626 preempt_disable(); 627 628 /* Save FP & vector context, then disable FPU & MSA */ 629 if (task->signal == current->signal) 630 lose_fpu(1); 631 632 /* Prevent any threads from obtaining live FP context */ 633 atomic_set(&task->mm->context.fp_mode_switching, 1); 634 smp_mb__after_atomic(); 635 636 /* 637 * If there are multiple online CPUs then force any which are running 638 * threads in this process to lose their FPU context, which they can't 639 * regain until fp_mode_switching is cleared later. 640 */ 641 if (num_online_cpus() > 1) { 642 /* No need to send an IPI for the local CPU */ 643 max_users = (task->mm == current->mm) ? 1 : 0; 644 645 if (atomic_read(¤t->mm->mm_users) > max_users) 646 smp_call_function(prepare_for_fp_mode_switch, 647 (void *)current->mm, 1); 648 } 649 650 /* 651 * There are now no threads of the process with live FP context, so it 652 * is safe to proceed with the FP mode switch. 653 */ 654 for_each_thread(task, t) { 655 /* Update desired FP register width */ 656 if (value & PR_FP_MODE_FR) { 657 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS); 658 } else { 659 set_tsk_thread_flag(t, TIF_32BIT_FPREGS); 660 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE); 661 } 662 663 /* Update desired FP single layout */ 664 if (value & PR_FP_MODE_FRE) 665 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 666 else 667 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 668 } 669 670 /* Allow threads to use FP again */ 671 atomic_set(&task->mm->context.fp_mode_switching, 0); 672 preempt_enable(); 673 674 return 0; 675 } 676