xref: /linux/arch/mips/kernel/proc.c (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /*
2  *  linux/arch/mips/kernel/proc.c
3  *
4  *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
5  *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
6  *  Copyright (C) 2004  Maciej W. Rozycki
7  */
8 #include <linux/config.h>
9 #include <linux/delay.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/seq_file.h>
13 #include <asm/bootinfo.h>
14 #include <asm/cpu.h>
15 #include <asm/cpu-features.h>
16 #include <asm/mipsregs.h>
17 #include <asm/processor.h>
18 #include <asm/watch.h>
19 
20 unsigned int vced_count, vcei_count;
21 
22 static const char *cpu_name[] = {
23 	[CPU_UNKNOWN]	= "unknown",
24 	[CPU_R2000]	= "R2000",
25 	[CPU_R3000]	= "R3000",
26 	[CPU_R3000A]	= "R3000A",
27 	[CPU_R3041]	= "R3041",
28 	[CPU_R3051]	= "R3051",
29 	[CPU_R3052]	= "R3052",
30 	[CPU_R3081]	= "R3081",
31 	[CPU_R3081E]	= "R3081E",
32 	[CPU_R4000PC]	= "R4000PC",
33 	[CPU_R4000SC]	= "R4000SC",
34 	[CPU_R4000MC]	= "R4000MC",
35         [CPU_R4200]	= "R4200",
36 	[CPU_R4400PC]	= "R4400PC",
37 	[CPU_R4400SC]	= "R4400SC",
38 	[CPU_R4400MC]	= "R4400MC",
39 	[CPU_R4600]	= "R4600",
40 	[CPU_R6000]	= "R6000",
41         [CPU_R6000A]	= "R6000A",
42 	[CPU_R8000]	= "R8000",
43 	[CPU_R10000]	= "R10000",
44 	[CPU_R12000]	= "R12000",
45 	[CPU_R14000]	= "R14000",
46 	[CPU_R4300]	= "R4300",
47 	[CPU_R4650]	= "R4650",
48 	[CPU_R4700]	= "R4700",
49 	[CPU_R5000]	= "R5000",
50         [CPU_R5000A]	= "R5000A",
51 	[CPU_R4640]	= "R4640",
52 	[CPU_NEVADA]	= "Nevada",
53 	[CPU_RM7000]	= "RM7000",
54 	[CPU_RM9000]	= "RM9000",
55 	[CPU_R5432]	= "R5432",
56 	[CPU_4KC]	= "MIPS 4Kc",
57         [CPU_5KC]	= "MIPS 5Kc",
58 	[CPU_R4310]	= "R4310",
59 	[CPU_SB1]	= "SiByte SB1",
60 	[CPU_SB1A]	= "SiByte SB1A",
61 	[CPU_TX3912]	= "TX3912",
62 	[CPU_TX3922]	= "TX3922",
63 	[CPU_TX3927]	= "TX3927",
64 	[CPU_AU1000]	= "Au1000",
65 	[CPU_AU1500]	= "Au1500",
66 	[CPU_AU1100]	= "Au1100",
67 	[CPU_AU1550]	= "Au1550",
68 	[CPU_AU1200]	= "Au1200",
69 	[CPU_4KEC]	= "MIPS 4KEc",
70 	[CPU_4KSC]	= "MIPS 4KSc",
71 	[CPU_VR41XX]	= "NEC Vr41xx",
72 	[CPU_R5500]	= "R5500",
73 	[CPU_TX49XX]	= "TX49xx",
74 	[CPU_20KC]	= "MIPS 20Kc",
75 	[CPU_24K]	= "MIPS 24K",
76 	[CPU_25KF]	= "MIPS 25Kf",
77 	[CPU_34K]	= "MIPS 34K",
78 	[CPU_74K]	= "MIPS 74K",
79 	[CPU_VR4111]	= "NEC VR4111",
80 	[CPU_VR4121]	= "NEC VR4121",
81 	[CPU_VR4122]	= "NEC VR4122",
82 	[CPU_VR4131]	= "NEC VR4131",
83 	[CPU_VR4133]	= "NEC VR4133",
84 	[CPU_VR4181]	= "NEC VR4181",
85 	[CPU_VR4181A]	= "NEC VR4181A",
86 	[CPU_SR71000]	= "Sandcraft SR71000",
87 	[CPU_PR4450]	= "Philips PR4450",
88 };
89 
90 
91 static int show_cpuinfo(struct seq_file *m, void *v)
92 {
93 	unsigned int version = current_cpu_data.processor_id;
94 	unsigned int fp_vers = current_cpu_data.fpu_id;
95 	unsigned long n = (unsigned long) v - 1;
96 	char fmt [64];
97 
98 #ifdef CONFIG_SMP
99 	if (!cpu_isset(n, cpu_online_map))
100 		return 0;
101 #endif
102 
103 	/*
104 	 * For the first processor also print the system type
105 	 */
106 	if (n == 0)
107 		seq_printf(m, "system type\t\t: %s\n", get_system_type());
108 
109 	seq_printf(m, "processor\t\t: %ld\n", n);
110 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
111 	        cpu_has_fpu ? "  FPU V%d.%d" : "");
112 	seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ?
113 	                            current_cpu_data.cputype : CPU_UNKNOWN],
114 	                           (version >> 4) & 0x0f, version & 0x0f,
115 	                           (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
116 	seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
117 	              cpu_data[n].udelay_val / (500000/HZ),
118 	              (cpu_data[n].udelay_val / (5000/HZ)) % 100);
119 	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
120 	seq_printf(m, "microsecond timers\t: %s\n",
121 	              cpu_has_counter ? "yes" : "no");
122 	seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize);
123 	seq_printf(m, "extra interrupt vector\t: %s\n",
124 	              cpu_has_divec ? "yes" : "no");
125 	seq_printf(m, "hardware watchpoint\t: %s\n",
126 	              cpu_has_watch ? "yes" : "no");
127 	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
128 		      cpu_has_mips16 ? " mips16" : "",
129 		      cpu_has_mdmx ? " mdmx" : "",
130 		      cpu_has_mips3d ? " mips3d" : "",
131 		      cpu_has_smartmips ? " smartmips" : "",
132 		      cpu_has_dsp ? " dsp" : "",
133 		      cpu_has_mipsmt ? " mt" : ""
134 		);
135 
136 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
137 	        cpu_has_vce ? "%u" : "not available");
138 	seq_printf(m, fmt, 'D', vced_count);
139 	seq_printf(m, fmt, 'I', vcei_count);
140 	seq_printf(m, "\n");
141 
142 	return 0;
143 }
144 
145 static void *c_start(struct seq_file *m, loff_t *pos)
146 {
147 	unsigned long i = *pos;
148 
149 	return i < NR_CPUS ? (void *) (i + 1) : NULL;
150 }
151 
152 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
153 {
154 	++*pos;
155 	return c_start(m, pos);
156 }
157 
158 static void c_stop(struct seq_file *m, void *v)
159 {
160 }
161 
162 struct seq_operations cpuinfo_op = {
163 	.start	= c_start,
164 	.next	= c_next,
165 	.stop	= c_stop,
166 	.show	= show_cpuinfo,
167 };
168