xref: /linux/arch/mips/kernel/proc.c (revision de2fe5e07d58424bc286fff3fd3c1b0bf933cd58)
1 /*
2  *  linux/arch/mips/kernel/proc.c
3  *
4  *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
5  *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
6  *  Copyright (C) 2004  Maciej W. Rozycki
7  */
8 #include <linux/config.h>
9 #include <linux/delay.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/seq_file.h>
13 #include <asm/bootinfo.h>
14 #include <asm/cpu.h>
15 #include <asm/cpu-features.h>
16 #include <asm/mipsregs.h>
17 #include <asm/processor.h>
18 #include <asm/watch.h>
19 
20 unsigned int vced_count, vcei_count;
21 
22 static const char *cpu_name[] = {
23 	[CPU_UNKNOWN]	= "unknown",
24 	[CPU_R2000]	= "R2000",
25 	[CPU_R3000]	= "R3000",
26 	[CPU_R3000A]	= "R3000A",
27 	[CPU_R3041]	= "R3041",
28 	[CPU_R3051]	= "R3051",
29 	[CPU_R3052]	= "R3052",
30 	[CPU_R3081]	= "R3081",
31 	[CPU_R3081E]	= "R3081E",
32 	[CPU_R4000PC]	= "R4000PC",
33 	[CPU_R4000SC]	= "R4000SC",
34 	[CPU_R4000MC]	= "R4000MC",
35         [CPU_R4200]	= "R4200",
36 	[CPU_R4400PC]	= "R4400PC",
37 	[CPU_R4400SC]	= "R4400SC",
38 	[CPU_R4400MC]	= "R4400MC",
39 	[CPU_R4600]	= "R4600",
40 	[CPU_R6000]	= "R6000",
41         [CPU_R6000A]	= "R6000A",
42 	[CPU_R8000]	= "R8000",
43 	[CPU_R10000]	= "R10000",
44 	[CPU_R12000]	= "R12000",
45 	[CPU_R4300]	= "R4300",
46 	[CPU_R4650]	= "R4650",
47 	[CPU_R4700]	= "R4700",
48 	[CPU_R5000]	= "R5000",
49         [CPU_R5000A]	= "R5000A",
50 	[CPU_R4640]	= "R4640",
51 	[CPU_NEVADA]	= "Nevada",
52 	[CPU_RM7000]	= "RM7000",
53 	[CPU_RM9000]	= "RM9000",
54 	[CPU_R5432]	= "R5432",
55 	[CPU_4KC]	= "MIPS 4Kc",
56         [CPU_5KC]	= "MIPS 5Kc",
57 	[CPU_R4310]	= "R4310",
58 	[CPU_SB1]	= "SiByte SB1",
59 	[CPU_SB1A]	= "SiByte SB1A",
60 	[CPU_TX3912]	= "TX3912",
61 	[CPU_TX3922]	= "TX3922",
62 	[CPU_TX3927]	= "TX3927",
63 	[CPU_AU1000]	= "Au1000",
64 	[CPU_AU1500]	= "Au1500",
65 	[CPU_AU1100]	= "Au1100",
66 	[CPU_AU1550]	= "Au1550",
67 	[CPU_AU1200]	= "Au1200",
68 	[CPU_4KEC]	= "MIPS 4KEc",
69 	[CPU_4KSC]	= "MIPS 4KSc",
70 	[CPU_VR41XX]	= "NEC Vr41xx",
71 	[CPU_R5500]	= "R5500",
72 	[CPU_TX49XX]	= "TX49xx",
73 	[CPU_20KC]	= "MIPS 20Kc",
74 	[CPU_24K]	= "MIPS 24K",
75 	[CPU_25KF]	= "MIPS 25Kf",
76 	[CPU_34K]	= "MIPS 34K",
77 	[CPU_VR4111]	= "NEC VR4111",
78 	[CPU_VR4121]	= "NEC VR4121",
79 	[CPU_VR4122]	= "NEC VR4122",
80 	[CPU_VR4131]	= "NEC VR4131",
81 	[CPU_VR4133]	= "NEC VR4133",
82 	[CPU_VR4181]	= "NEC VR4181",
83 	[CPU_VR4181A]	= "NEC VR4181A",
84 	[CPU_SR71000]	= "Sandcraft SR71000",
85 	[CPU_PR4450]	= "Philips PR4450",
86 };
87 
88 
89 static int show_cpuinfo(struct seq_file *m, void *v)
90 {
91 	unsigned int version = current_cpu_data.processor_id;
92 	unsigned int fp_vers = current_cpu_data.fpu_id;
93 	unsigned long n = (unsigned long) v - 1;
94 	char fmt [64];
95 
96 #ifdef CONFIG_SMP
97 	if (!cpu_isset(n, cpu_online_map))
98 		return 0;
99 #endif
100 
101 	/*
102 	 * For the first processor also print the system type
103 	 */
104 	if (n == 0)
105 		seq_printf(m, "system type\t\t: %s\n", get_system_type());
106 
107 	seq_printf(m, "processor\t\t: %ld\n", n);
108 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
109 	        cpu_has_fpu ? "  FPU V%d.%d" : "");
110 	seq_printf(m, fmt, cpu_name[current_cpu_data.cputype <= CPU_LAST ?
111 	                            current_cpu_data.cputype : CPU_UNKNOWN],
112 	                           (version >> 4) & 0x0f, version & 0x0f,
113 	                           (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
114 	seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
115 	              cpu_data[n].udelay_val / (500000/HZ),
116 	              (cpu_data[n].udelay_val / (5000/HZ)) % 100);
117 	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
118 	seq_printf(m, "microsecond timers\t: %s\n",
119 	              cpu_has_counter ? "yes" : "no");
120 	seq_printf(m, "tlb_entries\t\t: %d\n", current_cpu_data.tlbsize);
121 	seq_printf(m, "extra interrupt vector\t: %s\n",
122 	              cpu_has_divec ? "yes" : "no");
123 	seq_printf(m, "hardware watchpoint\t: %s\n",
124 	              cpu_has_watch ? "yes" : "no");
125 	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
126 		      cpu_has_mips16 ? " mips16" : "",
127 		      cpu_has_mdmx ? " mdmx" : "",
128 		      cpu_has_mips3d ? " mips3d" : "",
129 		      cpu_has_smartmips ? " smartmips" : "",
130 		      cpu_has_dsp ? " dsp" : "",
131 		      cpu_has_mipsmt ? " mt" : ""
132 		);
133 
134 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
135 	        cpu_has_vce ? "%u" : "not available");
136 	seq_printf(m, fmt, 'D', vced_count);
137 	seq_printf(m, fmt, 'I', vcei_count);
138 	seq_printf(m, "\n");
139 
140 	return 0;
141 }
142 
143 static void *c_start(struct seq_file *m, loff_t *pos)
144 {
145 	unsigned long i = *pos;
146 
147 	return i < NR_CPUS ? (void *) (i + 1) : NULL;
148 }
149 
150 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
151 {
152 	++*pos;
153 	return c_start(m, pos);
154 }
155 
156 static void c_stop(struct seq_file *m, void *v)
157 {
158 }
159 
160 struct seq_operations cpuinfo_op = {
161 	.start	= c_start,
162 	.next	= c_next,
163 	.stop	= c_stop,
164 	.show	= show_cpuinfo,
165 };
166