1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 1995, 1996, 2001 Ralf Baechle 4 * Copyright (C) 2001, 2004 MIPS Technologies, Inc. 5 * Copyright (C) 2004 Maciej W. Rozycki 6 */ 7 #include <linux/delay.h> 8 #include <linux/kernel.h> 9 #include <linux/sched.h> 10 #include <linux/seq_file.h> 11 #include <asm/bootinfo.h> 12 #include <asm/cpu.h> 13 #include <asm/cpu-features.h> 14 #include <asm/idle.h> 15 #include <asm/mipsregs.h> 16 #include <asm/processor.h> 17 #include <asm/prom.h> 18 19 unsigned int vced_count, vcei_count; 20 21 /* 22 * No lock; only written during early bootup by CPU 0. 23 */ 24 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); 25 26 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) 27 { 28 return raw_notifier_chain_register(&proc_cpuinfo_chain, nb); 29 } 30 31 int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v) 32 { 33 return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v); 34 } 35 36 static int show_cpuinfo(struct seq_file *m, void *v) 37 { 38 struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args; 39 unsigned long n = (unsigned long) v - 1; 40 unsigned int version = cpu_data[n].processor_id; 41 unsigned int fp_vers = cpu_data[n].fpu_id; 42 char fmt[64]; 43 int i; 44 45 #ifdef CONFIG_SMP 46 if (!cpu_online(n)) 47 return 0; 48 #endif 49 50 /* 51 * For the first processor also print the system type 52 */ 53 if (n == 0) { 54 seq_printf(m, "system type\t\t: %s\n", get_system_type()); 55 if (mips_get_machine_name()) 56 seq_printf(m, "machine\t\t\t: %s\n", 57 mips_get_machine_name()); 58 } 59 60 seq_printf(m, "processor\t\t: %ld\n", n); 61 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 62 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 63 seq_printf(m, fmt, __cpu_name[n], 64 (version >> 4) & 0x0f, version & 0x0f, 65 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 66 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", 67 cpu_data[n].udelay_val / (500000/HZ), 68 (cpu_data[n].udelay_val / (5000/HZ)) % 100); 69 seq_printf(m, "wait instruction\t: %s\n", str_yes_no(cpu_wait)); 70 seq_printf(m, "microsecond timers\t: %s\n", 71 str_yes_no(cpu_has_counter)); 72 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); 73 seq_printf(m, "extra interrupt vector\t: %s\n", 74 str_yes_no(cpu_has_divec)); 75 seq_printf(m, "hardware watchpoint\t: %s", str_yes_no(cpu_has_watch)); 76 if (cpu_has_watch) { 77 seq_printf(m, ", count: %d, address/irw mask: [", 78 cpu_data[n].watch_reg_count); 79 for (i = 0; i < cpu_data[n].watch_reg_count; i++) 80 seq_printf(m, "%s0x%04x", i ? ", " : "", 81 cpu_data[n].watch_reg_masks[i]); 82 seq_putc(m, ']'); 83 } 84 85 seq_puts(m, "\nisa\t\t\t:"); 86 if (cpu_has_mips_1) 87 seq_puts(m, " mips1"); 88 if (cpu_has_mips_2) 89 seq_puts(m, " mips2"); 90 if (cpu_has_mips_3) 91 seq_puts(m, " mips3"); 92 if (cpu_has_mips_4) 93 seq_puts(m, " mips4"); 94 if (cpu_has_mips_5) 95 seq_puts(m, " mips5"); 96 if (cpu_has_mips32r1) 97 seq_puts(m, " mips32r1"); 98 if (cpu_has_mips32r2) 99 seq_puts(m, " mips32r2"); 100 if (cpu_has_mips32r5) 101 seq_puts(m, " mips32r5"); 102 if (cpu_has_mips32r6) 103 seq_puts(m, " mips32r6"); 104 if (cpu_has_mips64r1) 105 seq_puts(m, " mips64r1"); 106 if (cpu_has_mips64r2) 107 seq_puts(m, " mips64r2"); 108 if (cpu_has_mips64r5) 109 seq_puts(m, " mips64r5"); 110 if (cpu_has_mips64r6) 111 seq_puts(m, " mips64r6"); 112 seq_puts(m, "\n"); 113 114 seq_puts(m, "ASEs implemented\t:"); 115 if (cpu_has_mips16) 116 seq_puts(m, " mips16"); 117 if (cpu_has_mips16e2) 118 seq_puts(m, " mips16e2"); 119 if (cpu_has_mdmx) 120 seq_puts(m, " mdmx"); 121 if (cpu_has_mips3d) 122 seq_puts(m, " mips3d"); 123 if (cpu_has_smartmips) 124 seq_puts(m, " smartmips"); 125 if (cpu_has_dsp) 126 seq_puts(m, " dsp"); 127 if (cpu_has_dsp2) 128 seq_puts(m, " dsp2"); 129 if (cpu_has_dsp3) 130 seq_puts(m, " dsp3"); 131 if (cpu_has_mipsmt) 132 seq_puts(m, " mt"); 133 if (cpu_has_mmips) 134 seq_puts(m, " micromips"); 135 if (cpu_has_vz) 136 seq_puts(m, " vz"); 137 if (cpu_has_msa) 138 seq_puts(m, " msa"); 139 if (cpu_has_eva) 140 seq_puts(m, " eva"); 141 if (cpu_has_htw) 142 seq_puts(m, " htw"); 143 if (cpu_has_xpa) 144 seq_puts(m, " xpa"); 145 if (cpu_has_loongson_mmi) 146 seq_puts(m, " loongson-mmi"); 147 if (cpu_has_loongson_cam) 148 seq_puts(m, " loongson-cam"); 149 if (cpu_has_loongson_ext) 150 seq_puts(m, " loongson-ext"); 151 if (cpu_has_loongson_ext2) 152 seq_puts(m, " loongson-ext2"); 153 seq_putc(m, '\n'); 154 155 if (cpu_has_mmips) 156 seq_printf(m, "micromips kernel\t: %s\n", 157 str_yes_no(read_c0_config3() & MIPS_CONF3_ISA_OE)); 158 159 seq_puts(m, "Options implemented\t:"); 160 if (cpu_has_tlb) 161 seq_puts(m, " tlb"); 162 if (cpu_has_ftlb) 163 seq_puts(m, " ftlb"); 164 if (cpu_has_tlbinv) 165 seq_puts(m, " tlbinv"); 166 if (cpu_has_segments) 167 seq_puts(m, " segments"); 168 if (cpu_has_rixiex) 169 seq_puts(m, " rixiex"); 170 if (cpu_has_ldpte) 171 seq_puts(m, " ldpte"); 172 if (cpu_has_maar) 173 seq_puts(m, " maar"); 174 if (cpu_has_rw_llb) 175 seq_puts(m, " rw_llb"); 176 if (cpu_has_4kex) 177 seq_puts(m, " 4kex"); 178 if (cpu_has_3k_cache) 179 seq_puts(m, " 3k_cache"); 180 if (cpu_has_4k_cache) 181 seq_puts(m, " 4k_cache"); 182 if (cpu_has_octeon_cache) 183 seq_puts(m, " octeon_cache"); 184 if (raw_cpu_has_fpu) 185 seq_puts(m, " fpu"); 186 if (cpu_has_32fpr) 187 seq_puts(m, " 32fpr"); 188 if (cpu_has_cache_cdex_p) 189 seq_puts(m, " cache_cdex_p"); 190 if (cpu_has_cache_cdex_s) 191 seq_puts(m, " cache_cdex_s"); 192 if (cpu_has_prefetch) 193 seq_puts(m, " prefetch"); 194 if (cpu_has_mcheck) 195 seq_puts(m, " mcheck"); 196 if (cpu_has_ejtag) 197 seq_puts(m, " ejtag"); 198 if (cpu_has_llsc) 199 seq_puts(m, " llsc"); 200 if (cpu_has_guestctl0ext) 201 seq_puts(m, " guestctl0ext"); 202 if (cpu_has_guestctl1) 203 seq_puts(m, " guestctl1"); 204 if (cpu_has_guestctl2) 205 seq_puts(m, " guestctl2"); 206 if (cpu_has_guestid) 207 seq_puts(m, " guestid"); 208 if (cpu_has_drg) 209 seq_puts(m, " drg"); 210 if (cpu_has_rixi) 211 seq_puts(m, " rixi"); 212 if (cpu_has_lpa) 213 seq_puts(m, " lpa"); 214 if (cpu_has_mvh) 215 seq_puts(m, " mvh"); 216 if (cpu_has_vtag_icache) 217 seq_puts(m, " vtag_icache"); 218 if (cpu_has_dc_aliases) 219 seq_puts(m, " dc_aliases"); 220 if (cpu_has_ic_fills_f_dc) 221 seq_puts(m, " ic_fills_f_dc"); 222 if (cpu_has_pindexed_dcache) 223 seq_puts(m, " pindexed_dcache"); 224 if (cpu_has_userlocal) 225 seq_puts(m, " userlocal"); 226 if (cpu_has_nofpuex) 227 seq_puts(m, " nofpuex"); 228 if (cpu_has_vint) 229 seq_puts(m, " vint"); 230 if (cpu_has_veic) 231 seq_puts(m, " veic"); 232 if (cpu_has_inclusive_pcaches) 233 seq_puts(m, " inclusive_pcaches"); 234 if (cpu_has_perf_cntr_intr_bit) 235 seq_puts(m, " perf_cntr_intr_bit"); 236 if (cpu_has_ufr) 237 seq_puts(m, " ufr"); 238 if (cpu_has_fre) 239 seq_puts(m, " fre"); 240 if (cpu_has_cdmm) 241 seq_puts(m, " cdmm"); 242 if (cpu_has_small_pages) 243 seq_puts(m, " small_pages"); 244 if (cpu_has_nan_legacy) 245 seq_puts(m, " nan_legacy"); 246 if (cpu_has_nan_2008) 247 seq_puts(m, " nan_2008"); 248 if (cpu_has_ebase_wg) 249 seq_puts(m, " ebase_wg"); 250 if (cpu_has_badinstr) 251 seq_puts(m, " badinstr"); 252 if (cpu_has_badinstrp) 253 seq_puts(m, " badinstrp"); 254 if (cpu_has_contextconfig) 255 seq_puts(m, " contextconfig"); 256 if (cpu_has_perf) 257 seq_puts(m, " perf"); 258 if (cpu_has_mac2008_only) 259 seq_puts(m, " mac2008_only"); 260 if (cpu_has_ftlbparex) 261 seq_puts(m, " ftlbparex"); 262 if (cpu_has_gsexcex) 263 seq_puts(m, " gsexcex"); 264 if (cpu_has_shared_ftlb_ram) 265 seq_puts(m, " shared_ftlb_ram"); 266 if (cpu_has_shared_ftlb_entries) 267 seq_puts(m, " shared_ftlb_entries"); 268 if (cpu_has_mipsmt_pertccounters) 269 seq_puts(m, " mipsmt_pertccounters"); 270 if (cpu_has_mmid) 271 seq_puts(m, " mmid"); 272 if (cpu_has_mm_sysad) 273 seq_puts(m, " mm_sysad"); 274 if (cpu_has_mm_full) 275 seq_puts(m, " mm_full"); 276 seq_puts(m, "\n"); 277 278 seq_printf(m, "shadow register sets\t: %d\n", 279 cpu_data[n].srsets); 280 seq_printf(m, "kscratch registers\t: %d\n", 281 hweight8(cpu_data[n].kscratch_mask)); 282 seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package); 283 seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n])); 284 285 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6) 286 if (cpu_has_mipsmt) 287 seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n])); 288 else if (cpu_has_vp) 289 seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n])); 290 #endif 291 292 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 293 cpu_has_vce ? "%u" : "not available"); 294 seq_printf(m, fmt, 'D', vced_count); 295 seq_printf(m, fmt, 'I', vcei_count); 296 297 proc_cpuinfo_notifier_args.m = m; 298 proc_cpuinfo_notifier_args.n = n; 299 300 raw_notifier_call_chain(&proc_cpuinfo_chain, 0, 301 &proc_cpuinfo_notifier_args); 302 303 seq_putc(m, '\n'); 304 305 return 0; 306 } 307 308 static void *c_start(struct seq_file *m, loff_t *pos) 309 { 310 unsigned long i = *pos; 311 312 return i < nr_cpu_ids ? (void *) (i + 1) : NULL; 313 } 314 315 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 316 { 317 ++*pos; 318 return c_start(m, pos); 319 } 320 321 static void c_stop(struct seq_file *m, void *v) 322 { 323 } 324 325 const struct seq_operations cpuinfo_op = { 326 .start = c_start, 327 .next = c_next, 328 .stop = c_stop, 329 .show = show_cpuinfo, 330 }; 331