1 /* 2 * linux/arch/mips/kernel/proc.c 3 * 4 * Copyright (C) 1995, 1996, 2001 Ralf Baechle 5 * Copyright (C) 2001, 2004 MIPS Technologies, Inc. 6 * Copyright (C) 2004 Maciej W. Rozycki 7 */ 8 #include <linux/delay.h> 9 #include <linux/kernel.h> 10 #include <linux/sched.h> 11 #include <linux/seq_file.h> 12 #include <asm/bootinfo.h> 13 #include <asm/cpu.h> 14 #include <asm/cpu-features.h> 15 #include <asm/mipsregs.h> 16 #include <asm/processor.h> 17 18 unsigned int vced_count, vcei_count; 19 20 static int show_cpuinfo(struct seq_file *m, void *v) 21 { 22 unsigned long n = (unsigned long) v - 1; 23 unsigned int version = cpu_data[n].processor_id; 24 unsigned int fp_vers = cpu_data[n].fpu_id; 25 char fmt [64]; 26 int i; 27 28 #ifdef CONFIG_SMP 29 if (!cpu_isset(n, cpu_online_map)) 30 return 0; 31 #endif 32 33 /* 34 * For the first processor also print the system type 35 */ 36 if (n == 0) 37 seq_printf(m, "system type\t\t: %s\n", get_system_type()); 38 39 seq_printf(m, "processor\t\t: %ld\n", n); 40 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 41 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 42 seq_printf(m, fmt, __cpu_name[n], 43 (version >> 4) & 0x0f, version & 0x0f, 44 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 45 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n", 46 cpu_data[n].udelay_val / (500000/HZ), 47 (cpu_data[n].udelay_val / (5000/HZ)) % 100); 48 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); 49 seq_printf(m, "microsecond timers\t: %s\n", 50 cpu_has_counter ? "yes" : "no"); 51 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); 52 seq_printf(m, "extra interrupt vector\t: %s\n", 53 cpu_has_divec ? "yes" : "no"); 54 seq_printf(m, "hardware watchpoint\t: %s", 55 cpu_has_watch ? "yes, " : "no\n"); 56 if (cpu_has_watch) { 57 seq_printf(m, "count: %d, address/irw mask: [", 58 cpu_data[n].watch_reg_count); 59 for (i = 0; i < cpu_data[n].watch_reg_count; i++) 60 seq_printf(m, "%s0x%04x", i ? ", " : "" , 61 cpu_data[n].watch_reg_masks[i]); 62 seq_printf(m, "]\n"); 63 } 64 seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", 65 cpu_has_mips16 ? " mips16" : "", 66 cpu_has_mdmx ? " mdmx" : "", 67 cpu_has_mips3d ? " mips3d" : "", 68 cpu_has_smartmips ? " smartmips" : "", 69 cpu_has_dsp ? " dsp" : "", 70 cpu_has_mipsmt ? " mt" : "" 71 ); 72 seq_printf(m, "shadow register sets\t: %d\n", 73 cpu_data[n].srsets); 74 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); 75 76 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 77 cpu_has_vce ? "%u" : "not available"); 78 seq_printf(m, fmt, 'D', vced_count); 79 seq_printf(m, fmt, 'I', vcei_count); 80 seq_printf(m, "\n"); 81 82 return 0; 83 } 84 85 static void *c_start(struct seq_file *m, loff_t *pos) 86 { 87 unsigned long i = *pos; 88 89 return i < NR_CPUS ? (void *) (i + 1) : NULL; 90 } 91 92 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 93 { 94 ++*pos; 95 return c_start(m, pos); 96 } 97 98 static void c_stop(struct seq_file *m, void *v) 99 { 100 } 101 102 const struct seq_operations cpuinfo_op = { 103 .start = c_start, 104 .next = c_next, 105 .stop = c_stop, 106 .show = show_cpuinfo, 107 }; 108