xref: /linux/arch/mips/kernel/i8253.c (revision 8ace5c4698ec8da53e69095596718d5a936433de)
1 /*
2  * i8253.c  8253/PIT functions
3  *
4  */
5 #include <linux/clockchips.h>
6 #include <linux/init.h>
7 #include <linux/interrupt.h>
8 #include <linux/jiffies.h>
9 #include <linux/module.h>
10 #include <linux/smp.h>
11 #include <linux/spinlock.h>
12 #include <linux/irq.h>
13 
14 #include <asm/delay.h>
15 #include <asm/i8253.h>
16 #include <asm/io.h>
17 #include <asm/time.h>
18 
19 DEFINE_RAW_SPINLOCK(i8253_lock);
20 EXPORT_SYMBOL(i8253_lock);
21 
22 /*
23  * Initialize the PIT timer.
24  *
25  * This is also called after resume to bring the PIT into operation again.
26  */
27 static void init_pit_timer(enum clock_event_mode mode,
28 			   struct clock_event_device *evt)
29 {
30 	raw_spin_lock(&i8253_lock);
31 
32 	switch(mode) {
33 	case CLOCK_EVT_MODE_PERIODIC:
34 		/* binary, mode 2, LSB/MSB, ch 0 */
35 		outb_p(0x34, PIT_MODE);
36 		outb_p(LATCH & 0xff , PIT_CH0);	/* LSB */
37 		outb(LATCH >> 8 , PIT_CH0);	/* MSB */
38 		break;
39 
40 	case CLOCK_EVT_MODE_SHUTDOWN:
41 	case CLOCK_EVT_MODE_UNUSED:
42 		if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
43 		    evt->mode == CLOCK_EVT_MODE_ONESHOT) {
44 			outb_p(0x30, PIT_MODE);
45 			outb_p(0, PIT_CH0);
46 			outb_p(0, PIT_CH0);
47 		}
48 		break;
49 
50 	case CLOCK_EVT_MODE_ONESHOT:
51 		/* One shot setup */
52 		outb_p(0x38, PIT_MODE);
53 		break;
54 
55 	case CLOCK_EVT_MODE_RESUME:
56 		/* Nothing to do here */
57 		break;
58 	}
59 	raw_spin_unlock(&i8253_lock);
60 }
61 
62 /*
63  * Program the next event in oneshot mode
64  *
65  * Delta is given in PIT ticks
66  */
67 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
68 {
69 	raw_spin_lock(&i8253_lock);
70 	outb_p(delta & 0xff , PIT_CH0);	/* LSB */
71 	outb(delta >> 8 , PIT_CH0);	/* MSB */
72 	raw_spin_unlock(&i8253_lock);
73 
74 	return 0;
75 }
76 
77 /*
78  * On UP the PIT can serve all of the possible timer functions. On SMP systems
79  * it can be solely used for the global tick.
80  *
81  * The profiling and update capabilites are switched off once the local apic is
82  * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
83  * !using_apic_timer decisions in do_timer_interrupt_hook()
84  */
85 static struct clock_event_device pit_clockevent = {
86 	.name		= "pit",
87 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
88 	.set_mode	= init_pit_timer,
89 	.set_next_event = pit_next_event,
90 	.irq		= 0,
91 };
92 
93 static irqreturn_t timer_interrupt(int irq, void *dev_id)
94 {
95 	pit_clockevent.event_handler(&pit_clockevent);
96 
97 	return IRQ_HANDLED;
98 }
99 
100 static struct irqaction irq0  = {
101 	.handler = timer_interrupt,
102 	.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
103 	.name = "timer"
104 };
105 
106 /*
107  * Initialize the conversion factor and the min/max deltas of the clock event
108  * structure and register the clock event source with the framework.
109  */
110 void __init setup_pit_timer(void)
111 {
112 	struct clock_event_device *cd = &pit_clockevent;
113 	unsigned int cpu = smp_processor_id();
114 
115 	/*
116 	 * Start pit with the boot cpu mask and make it global after the
117 	 * IO_APIC has been initialized.
118 	 */
119 	cd->cpumask = cpumask_of(cpu);
120 	clockevent_set_clock(cd, CLOCK_TICK_RATE);
121 	cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
122 	cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
123 	clockevents_register_device(cd);
124 
125 	setup_irq(0, &irq0);
126 }
127 
128 static int __init init_pit_clocksource(void)
129 {
130 	if (num_possible_cpus() > 1) /* PIT does not scale! */
131 		return 0;
132 
133 	return clocksource_i8253_init();
134 }
135 arch_initcall(init_pit_clocksource);
136